x86-64.net

AMD (high performance)

Zen 5

AMD Zen 5 (2024) supports x86-64-v4.

x86-64 level
x86-64-v4
Vendor
AMD
First products
2024
Products
Ryzen 9000; Ryzen AI 300; EPYC 9005
Segments
desktopmobileworkstationserverembedded
GCC target
-march=znver5
Optimization
Optimizing code for Zen 5

Product lines

The product lines built on Zen 5, with the market segment the vendor sells each in and the sockets or soldered (BGA) packages its processors come in. Each socket links to the vendor page that states it.
Product lineSegmentSocketSource
Ryzen 9000desktopAM5amd.com
Ryzen AI 400desktopAM5ir.amd.com
Ryzen AI 300mobileFP8 (BGA)amd.com
Ryzen AI Max 300mobileFP11 (BGA)amd.com
Ryzen AI 400mobileFP8 (BGA)ir.amd.com
Ryzen 9000HXmobileFL1 (BGA)amd.com
Ryzen Z2 Extrememobilenot statedamd.com
Ryzen Threadripper 9000workstationsTR5amd.com
Ryzen Threadripper PRO 9000 WXworkstationsTR5amd.com
EPYC 9005serverSP5amd.com
EPYC 8005serverSP6amd.com
EPYC 4005serverAM5amd.com
Ryzen Embedded 9000embeddedAM5amd.com
Ryzen AI Embedded P100embeddedFP8 (BGA)amd.com
Ryzen AI Embedded X100embeddedFP11 (BGA)amd.com
EPYC Embedded 9005embeddedSP5amd.com
EPYC Embedded 4005embeddedAM5amd.com
EPYC Embedded 2005embeddedFL1 (BGA)amd.com

Feature checklist

Features required by each x86-64 level and whether Zen 5 has them. OSFXSR and OSXSAVE are set by the operating system; the table checks the hardware features they depend on.
FeatureZen 5Enumerated byLinux flag
x86-64-v1
CMOVYesCPUID.01H:EDX[15]cmov
CX8YesCPUID.01H:EDX[8]cx8
FPUYesCPUID.01H:EDX[0]fpu
FXSRYesCPUID.01H:EDX[24]fxsr
MMXYesCPUID.01H:EDX[23]mmx
OSFXSR via FXSRYesCPUID.01H:EDX[24]fxsr
SCEYesCPUID.80000001H:EDX[11]syscall
SSEYesCPUID.01H:EDX[25]sse
SSE2YesCPUID.01H:EDX[26]sse2
x86-64-v2
CMPXCHG16BYesCPUID.01H:ECX[13]cx16
LAHF-SAHFYesCPUID.80000001H:ECX[0]lahf_lm
POPCNTYesCPUID.01H:ECX[23]popcnt
SSE3YesCPUID.01H:ECX[0]pni
SSE4.1YesCPUID.01H:ECX[19]sse4_1
SSE4.2YesCPUID.01H:ECX[20]sse4_2
SSSE3YesCPUID.01H:ECX[9]ssse3
x86-64-v3
AVXYesCPUID.01H:ECX[28]avx
AVX2YesCPUID.(EAX=07H,ECX=0):EBX[5]avx2
BMI1YesCPUID.(EAX=07H,ECX=0):EBX[3]bmi1
BMI2YesCPUID.(EAX=07H,ECX=0):EBX[8]bmi2
F16CYesCPUID.01H:ECX[29]f16c
FMAYesCPUID.01H:ECX[12]fma
LZCNTYesCPUID.80000001H:ECX[5]abm
MOVBEYesCPUID.01H:ECX[22]movbe
OSXSAVE via XSAVEYesCPUID.01H:ECX[26]xsave
x86-64-v4
AVX512FYesCPUID.(EAX=07H,ECX=0):EBX[16]avx512f
AVX512BWYesCPUID.(EAX=07H,ECX=0):EBX[30]avx512bw
AVX512CDYesCPUID.(EAX=07H,ECX=0):EBX[28]avx512cd
AVX512DQYesCPUID.(EAX=07H,ECX=0):EBX[17]avx512dq
AVX512VLYesCPUID.(EAX=07H,ECX=0):EBX[31]avx512vl

Other extensions

Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.

Known vulnerabilities

The CVEs that the sources of the vulnerability list name as affecting Zen 5, in all of its models or in some of them.

  • CVE-2025-62626 RDSEED Failure on Zen 5
  • CVE-2025-54509 AMD Secure Processor and SMU firmware: Non-coherent Secure Processor memory access
  • CVE-2025-54502 AMD AGESA, SMM and BIOS firmware: LocateProtocol in the APCB SMM driver
  • CVE-2025-52534 AMD processor errata: Microcode bound check Some models
  • CVE-2025-40300 VMSCAPE
  • CVE-2025-29943 AMD SEV, SEV-ES and SEV-SNP: SEV-SNP guest stack pointer corruption
  • CVE-2025-29934 AMD SEV, SEV-ES and SEV-SNP: Stale TLB entries in SEV-SNP guests
  • CVE-2025-0033 AMD SEV, SEV-ES and SEV-SNP: RMP corruption during SNP initialization
  • CVE-2025-0032 Microcode Signature Verification: Microcode Patch Loading Cleanup Some models
  • CVE-2024-56161 Microcode Signature Verification: Microcode Signature Verification: SEV-SNP Some models
  • CVE-2024-36347 Microcode Signature Verification Some models
  • CVE-2023-31364 AMD processor errata: Guest-initiated machine check errors Some models
  • CVE-2023-20569 Speculative Return Stack Overflow
  • CVE-2017-5753 Spectre variant 1: Bounds Check Bypass
  • CVE-2017-5715 Spectre variant 2: Branch Target Injection

Sources

  1. GCC -march=znver5 feature set (PTA_ZNVER5)
  2. AMD PPR for Family 1Ah Model 02h, Revision C1 Processors (57238, rev. 0.49, March 2026): INVLPGB and SEV-SNP, which GCC’s -march sets leave out (57238_C1_pub_0.49.zip, SHA-256 e91d9fe3ae32df3d6c88012cdac261440cc06e089a0d83d191247a06c8c91e99): the EPYC 9005 server processors set CPUID_Fn80000008_EBX[INVLPGB] (bit 3) and RDPRU (bit 4) and define CPUID_Fn8000001F_EAX[SNP] (bit 4), whose value varies by part; [MCOMMIT] (bit 8) resets to 0.