AMD (high performance)
Zen 6
AMD Zen 6 (2026) supports x86-64-v4.
- x86-64 level
- x86-64-v4
- Vendor
- AMD
- First products
- 2026
- Products
- EPYC 9006 (Venice); Ryzen desktop and mobile (Olympic Ridge, Medusa), reported
- Segments
- GCC target
-march=znver6
AMD began revenue shipments of the first Zen 6 processors, EPYC 9006 "Venice", in the third quarter of 2026, with the first OEM systems due in the fourth. The feature list follows GCC's -march=znver6, and AMD's first Processor Programming References for Zen 6, which cover EPYC processors of Family 1Ah Models 50h-57h and C0h-CFh, give every feature on it as supported (AES-NI, PCLMULQDQ, VAES and VPCLMULQDQ as varying by part). Of the features that GCC's -march sets leave out, the references also set RDPRU and INVLPGB, and give SEV-SNP, which AMD's whitepaper on EPYC 9006 names, as varying by part. Like Zen 5, Zen 6 reports PREFETCHI in a CPUID bit of AMD's own, CPUID_Fn80000021_EAX[PREFETCHI] (bit 20), rather than in Intel's. The desktop and mobile parts come from press reports of an AMD documentation page that AMD has since taken down; AMD has not announced them.
Product lines
| Product line | Segment | Socket | Source |
|---|---|---|---|
| EPYC 9006 | server | SP7, SP8 | amd.com |
| Olympic RidgeReported, not confirmed by AMD: the press read it from an AMD documentation page that AMD took down (August 2026). | desktop | not stated | hothardware.com |
| MedusaReported, not confirmed by AMD: the press read it from an AMD documentation page that AMD took down (August 2026). | desktop | not stated | hothardware.com |
| MedusaReported, not confirmed by AMD: the press read it from an AMD documentation page that AMD took down (August 2026). | mobile | not stated | wccftech.com |
Feature checklist
| Feature | Zen 6 | Enumerated by | Linux flag |
|---|---|---|---|
| x86-64-v1 | |||
| CMOV | Yes | CPUID.01H:EDX[15] | cmov |
| CX8 | Yes | CPUID.01H:EDX[8] | cx8 |
| FPU | Yes | CPUID.01H:EDX[0] | fpu |
| FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| MMX | Yes | CPUID.01H:EDX[23] | mmx |
| OSFXSR via FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| SCE | Yes | CPUID.80000001H:EDX[11] | syscall |
| SSE | Yes | CPUID.01H:EDX[25] | sse |
| SSE2 | Yes | CPUID.01H:EDX[26] | sse2 |
| x86-64-v2 | |||
| CMPXCHG16B | Yes | CPUID.01H:ECX[13] | cx16 |
| LAHF-SAHF | Yes | CPUID.80000001H:ECX[0] | lahf_lm |
| POPCNT | Yes | CPUID.01H:ECX[23] | popcnt |
| SSE3 | Yes | CPUID.01H:ECX[0] | pni |
| SSE4.1 | Yes | CPUID.01H:ECX[19] | sse4_1 |
| SSE4.2 | Yes | CPUID.01H:ECX[20] | sse4_2 |
| SSSE3 | Yes | CPUID.01H:ECX[9] | ssse3 |
| x86-64-v3 | |||
| AVX | Yes | CPUID.01H:ECX[28] | avx |
| AVX2 | Yes | CPUID.(EAX=07H,ECX=0):EBX[5] | avx2 |
| BMI1 | Yes | CPUID.(EAX=07H,ECX=0):EBX[3] | bmi1 |
| BMI2 | Yes | CPUID.(EAX=07H,ECX=0):EBX[8] | bmi2 |
| F16C | Yes | CPUID.01H:ECX[29] | f16c |
| FMA | Yes | CPUID.01H:ECX[12] | fma |
| LZCNT | Yes | CPUID.80000001H:ECX[5] | abm |
| MOVBE | Yes | CPUID.01H:ECX[22] | movbe |
| OSXSAVE via XSAVE | Yes | CPUID.01H:ECX[26] | xsave |
| x86-64-v4 | |||
| AVX512F | Yes | CPUID.(EAX=07H,ECX=0):EBX[16] | avx512f |
| AVX512BW | Yes | CPUID.(EAX=07H,ECX=0):EBX[30] | avx512bw |
| AVX512CD | Yes | CPUID.(EAX=07H,ECX=0):EBX[28] | avx512cd |
| AVX512DQ | Yes | CPUID.(EAX=07H,ECX=0):EBX[17] | avx512dq |
| AVX512VL | Yes | CPUID.(EAX=07H,ECX=0):EBX[31] | avx512vl |
Other extensions
Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.
- AES-NI
- PCLMULQDQ
- SHA
- RDRAND
- RDSEED
- ADX
- CLWB
- MOVDIRI
- MOVDIR64B
- GFNI
- VAES
- VPCLMULQDQ
- SSE4a
- MONITORX
- CLZERO
- RDPRU
- INVLPGB
- SEV-SNP
- AVX-VNNI
- AVX-IFMA
- AVX-VNNI-INT8
- AVX-NE-CONVERT
- AVX512-IFMA
- AVX512-VBMI
- AVX512-VBMI2
- AVX512-VNNI
- AVX512-BITALG
- AVX512-VPOPCNTDQ
- AVX512-BF16
- AVX512-FP16
- AVX512-VP2INTERSECT
- AVX512-BMM
- PREFETCHI
Known vulnerabilities
The CVEs that the sources of the vulnerability list name as affecting Zen 6, in all of its models or in some of them.
- CVE-2025-40300 VMSCAPE
- CVE-2023-20569 Speculative Return Stack Overflow
- CVE-2017-5753 Spectre variant 1: Bounds Check Bypass
- CVE-2017-5715 Spectre variant 2: Branch Target Injection
Other AMD (high performance) microarchitectures
Sources
- GCC -march=znver6 feature set (PTA_ZNVER6)
- AMD EPYC 9006 Series Server CPUs: Architectural Leadership for the Next-Generation Data Center (whitepaper, 2026): SEV-SNP, which GCC’s -march sets leave out: the whitepaper lists it among the security capabilities of EPYC 9006.
- AMD PPR for Family 1Ah Model 50h, Revision B0 Processors (58264, rev. 0.45, September 2026): EPYC processors of Family 1Ah Models 50h-57h in the SP7 package (58264_B0_pub_045.zip, SHA-256 636c6d20e2f412db2faea57662fb364be93c325aa34631664f123188089079d1). They set the CPUID bit of every feature of -march=znver6, among them
CPUID_Fn00000007_EDX_x00[FP16](bit 23),CPUID_Fn00000007_EAX_x01[AVX_IFMA](bit 23),CPUID_Fn00000007_EDX_x01[AVX_VNNI_INT8](bit 4) and[AVX_NE_CONVERT](bit 5), andCPUID_Fn80000021_EAX[AVX512_BMM](bit 23); RDPRU and INVLPGB, which GCC’s -march sets leave out, inCPUID_Fn80000008_EBX[RDPRU](bit 4) and[INVLPGB](bit 3); and PREFETCHI inCPUID_Fn80000021_EAX[PREFETCHI](bit 20), leaving Intel’s bit 14 ofCPUID_Fn00000007_EDX_x01reserved.CPUID_Fn8000001F_EAX[SNP](bit 4), SEV-SNP, varies by part. - AMD PPR for Family 1Ah Model C0h, Revision A0 Processors (58655, rev. 0.42, September 2026): EPYC processors of Family 1Ah Models C0h-CFh, also in the SP7 package (58655_A0_pub_042.zip, SHA-256 ab037558dc818197efc4c4923af44867d5af83a3c44221d89b39a99767485d67): the same CPUID bits as 58264.
- AMD Third Quarter 2026 Financial Results, Prepared Remarks (November 3, 2026): AMD began revenue shipments of EPYC “Venice” in the third quarter of 2026 and expected the first OEM systems with it in the fourth.