AMD (high performance)
Zen+
AMD Zen+ (2018) supports x86-64-v3.
- x86-64 level
- x86-64-v3
- Vendor
- AMD
- First products
- 2018
- Products
- Ryzen 2000 desktop; Ryzen Threadripper 2000; Ryzen Embedded R2000
- Segments
- GCC target
-march=znver1- Optimization
- Optimizing code for Zen and Zen+
AMD's improved Zen core, made on a 12 nm process. GCC detects it as -march=znver1, the instruction set of Zen.
Product lines
| Product line | Segment | Socket | Source |
|---|---|---|---|
| Ryzen 2000 | desktop | AM4 | ir.amd.com |
| Ryzen Threadripper 2000 | workstation | sTR4 | ir.amd.com |
| Ryzen Embedded R2000 | embedded | FP5 (BGA) | amd.com |
Why not x86-64-v4?
Zen+ lacks AVX512BW, AVX512CD, AVX512DQ, AVX512F and AVX512VL, all of which x86-64-v4 requires.
Feature checklist
| Feature | Zen+ | Enumerated by | Linux flag |
|---|---|---|---|
| x86-64-v1 | |||
| CMOV | Yes | CPUID.01H:EDX[15] | cmov |
| CX8 | Yes | CPUID.01H:EDX[8] | cx8 |
| FPU | Yes | CPUID.01H:EDX[0] | fpu |
| FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| MMX | Yes | CPUID.01H:EDX[23] | mmx |
| OSFXSR via FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| SCE | Yes | CPUID.80000001H:EDX[11] | syscall |
| SSE | Yes | CPUID.01H:EDX[25] | sse |
| SSE2 | Yes | CPUID.01H:EDX[26] | sse2 |
| x86-64-v2 | |||
| CMPXCHG16B | Yes | CPUID.01H:ECX[13] | cx16 |
| LAHF-SAHF | Yes | CPUID.80000001H:ECX[0] | lahf_lm |
| POPCNT | Yes | CPUID.01H:ECX[23] | popcnt |
| SSE3 | Yes | CPUID.01H:ECX[0] | pni |
| SSE4.1 | Yes | CPUID.01H:ECX[19] | sse4_1 |
| SSE4.2 | Yes | CPUID.01H:ECX[20] | sse4_2 |
| SSSE3 | Yes | CPUID.01H:ECX[9] | ssse3 |
| x86-64-v3 | |||
| AVX | Yes | CPUID.01H:ECX[28] | avx |
| AVX2 | Yes | CPUID.(EAX=07H,ECX=0):EBX[5] | avx2 |
| BMI1 | Yes | CPUID.(EAX=07H,ECX=0):EBX[3] | bmi1 |
| BMI2 | Yes | CPUID.(EAX=07H,ECX=0):EBX[8] | bmi2 |
| F16C | Yes | CPUID.01H:ECX[29] | f16c |
| FMA | Yes | CPUID.01H:ECX[12] | fma |
| LZCNT | Yes | CPUID.80000001H:ECX[5] | abm |
| MOVBE | Yes | CPUID.01H:ECX[22] | movbe |
| OSXSAVE via XSAVE | Yes | CPUID.01H:ECX[26] | xsave |
| x86-64-v4 | |||
| AVX512F | No | CPUID.(EAX=07H,ECX=0):EBX[16] | avx512f |
| AVX512BW | No | CPUID.(EAX=07H,ECX=0):EBX[30] | avx512bw |
| AVX512CD | No | CPUID.(EAX=07H,ECX=0):EBX[28] | avx512cd |
| AVX512DQ | No | CPUID.(EAX=07H,ECX=0):EBX[17] | avx512dq |
| AVX512VL | No | CPUID.(EAX=07H,ECX=0):EBX[31] | avx512vl |
Other extensions
Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.
Known vulnerabilities
The CVEs that the sources of the vulnerability list name as affecting Zen+, in all of its models or in some of them.
- CVE-2025-54505 Floating Point Divider State Sampling
- CVE-2025-54502 AMD AGESA, SMM and BIOS firmware: LocateProtocol in the APCB SMM driver
- CVE-2025-40300 VMSCAPE
- CVE-2024-21925 AMD AGESA, SMM and BIOS firmware: AmdPspP2CmboxV2 input validation
- CVE-2024-0179 AMD AGESA, SMM and BIOS firmware: SMM callout in AmdCpmDisplayFeatureSMM
- CVE-2023-31315 AMD AGESA, SMM and BIOS firmware: SMM lock bypass
- CVE-2023-20599 AMD Secure Processor and SMU firmware: Crypto Co-Processor registers from x86
- CVE-2023-20589 AMD Secure Processor and SMU firmware: Voltage fault injection on fTPM secure boot
- CVE-2023-20588 Speculative Division by Zero
- CVE-2023-20569 Speculative Return Stack Overflow
- CVE-2023-20555 AMD AGESA, SMM and BIOS firmware: CpmDisplayFeatureSmm bit overwrite
- CVE-2022-29900 Retbleed: Retbleed (AMD)
- CVE-2022-27672 Cross-Thread Return Address Predictions
- CVE-2022-23829 AMD AGESA, SMM and BIOS firmware: SPI lock bypass
- CVE-2022-23824 Incomplete Branch Prediction Barrier: IBPB and Return Stack Buffer Interactions Some models
- CVE-2022-23823 Frequency Throttling Side Channel: Frequency Scaling Timing Power Side-Channels Some models
- CVE-2021-46778 Execution Unit Scheduler Contention Some models
- CVE-2021-26341 Straight-line Speculation Some models
- CVE-2017-5753 Spectre variant 1: Bounds Check Bypass
- CVE-2017-5715 Spectre variant 2: Branch Target Injection
Other AMD (high performance) microarchitectures
Sources
- GCC -march=znver1 (processor alias table)
- 2nd Generation AMD Ryzen Desktop Processors Deliver Best-in-Class Compute Performance and Even Faster Gaming Framerates than Previous Generation (AMD press release, April 19, 2018): The 12nm “Zen+” core, an improvement on the original “Zen” architecture.
- Linux 7.3 drivers/hwmon/k10temp.c: Family 17h model 08h is Zen+
- GCC common/config/i386/cpuinfo.h: Family 17h models up to 1Fh are znver1