x86-64.net

Intel Core (client)

Alder Lake

Intel Alder Lake (2021) supports x86-64-v3.

x86-64 level
x86-64-v3
Vendor
Intel
First products
2021
Products
12th generation Core
Segments
desktopmobileembedded
Cores
Golden Cove P-cores and Gracemont E-cores
GCC target
-march=alderlake
Optimization
Optimizing code for Golden Cove and Raptor Cove
E-cores
Optimizing code for Crestmont and Gracemont

Alder Lake does not support AVX-512: Intel keeps one instruction set on the P-cores and the E-cores, and the E-cores do not implement it.

Product lines

The product lines built on Alder Lake, with the market segment the vendor sells each in and the sockets or soldered (BGA) packages its processors come in. Each socket links to the vendor page that states it.
Product lineSegmentSocketSource
12th generation CoredesktopLGA1700intel.com
12th generation CoremobileBGA1744, BGA1781, BGA1964intel.com
12th generation CoreembeddedLGA1700, BGA1744intel.com
Pentium and CelerondesktopLGA1700intel.com
Pentium and CeleronmobileBGA1744, BGA1781intel.com
Pentium and CeleronembeddedLGA1700, BGA1744intel.com

Why not x86-64-v4?

Alder Lake lacks AVX512BW, AVX512CD, AVX512DQ, AVX512F and AVX512VL, all of which x86-64-v4 requires.

Feature checklist

Features required by each x86-64 level and whether Alder Lake has them. OSFXSR and OSXSAVE are set by the operating system; the table checks the hardware features they depend on.
FeatureAlder LakeEnumerated byLinux flag
x86-64-v1
CMOVYesCPUID.01H:EDX[15]cmov
CX8YesCPUID.01H:EDX[8]cx8
FPUYesCPUID.01H:EDX[0]fpu
FXSRYesCPUID.01H:EDX[24]fxsr
MMXYesCPUID.01H:EDX[23]mmx
OSFXSR via FXSRYesCPUID.01H:EDX[24]fxsr
SCEYesCPUID.80000001H:EDX[11]syscall
SSEYesCPUID.01H:EDX[25]sse
SSE2YesCPUID.01H:EDX[26]sse2
x86-64-v2
CMPXCHG16BYesCPUID.01H:ECX[13]cx16
LAHF-SAHFYesCPUID.80000001H:ECX[0]lahf_lm
POPCNTYesCPUID.01H:ECX[23]popcnt
SSE3YesCPUID.01H:ECX[0]pni
SSE4.1YesCPUID.01H:ECX[19]sse4_1
SSE4.2YesCPUID.01H:ECX[20]sse4_2
SSSE3YesCPUID.01H:ECX[9]ssse3
x86-64-v3
AVXYesCPUID.01H:ECX[28]avx
AVX2YesCPUID.(EAX=07H,ECX=0):EBX[5]avx2
BMI1YesCPUID.(EAX=07H,ECX=0):EBX[3]bmi1
BMI2YesCPUID.(EAX=07H,ECX=0):EBX[8]bmi2
F16CYesCPUID.01H:ECX[29]f16c
FMAYesCPUID.01H:ECX[12]fma
LZCNTYesCPUID.80000001H:ECX[5]abm
MOVBEYesCPUID.01H:ECX[22]movbe
OSXSAVE via XSAVEYesCPUID.01H:ECX[26]xsave
x86-64-v4
AVX512FNoCPUID.(EAX=07H,ECX=0):EBX[16]avx512f
AVX512BWNoCPUID.(EAX=07H,ECX=0):EBX[30]avx512bw
AVX512CDNoCPUID.(EAX=07H,ECX=0):EBX[28]avx512cd
AVX512DQNoCPUID.(EAX=07H,ECX=0):EBX[17]avx512dq
AVX512VLNoCPUID.(EAX=07H,ECX=0):EBX[31]avx512vl

Other extensions

Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.

Known vulnerabilities

The CVEs that the sources of the vulnerability list name as affecting Alder Lake, in all of its models or in some of them.

Sources

  1. GCC -march=alderlake feature set (PTA_ALDERLAKE)
  2. Linux 7.3 arch/x86/include/asm/intel-family.h: INTEL_ALDERLAKE, Golden Cove / Gracemont
  3. Intel 64 and IA-32 Architectures Optimization Reference Manual, Volume 1, 248966-051, Section 2.3.1: The 12th generation Core processors keep a common instruction set on both core types; the E-cores lack AVX-512, AVX-512 FP16 and TSX.
  4. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 4, 335592-093, Table 2-1: Models 06_97H and 06_9AH: 12th generation Core processors, Alder Lake.
  5. Intel ARK: Products formerly Alder Lake: Launch dates; the earliest is Q4'21 (Core i9-12900K).