x86-64 level
x86-64-v4
Vendor
Intel
First products
2020
Products
3rd generation Xeon Scalable for 4- and 8-socket servers
Segments
server
GCC target
-march=cooperlake
Optimization
Optimizing code for Skylake to Cooper Lake

Product lines

The product lines built on Cooper Lake, with the market segment the vendor sells each in and the sockets or soldered (BGA) packages its processors come in. Each socket links to the vendor page that states it.
Product lineSegmentSocketSource
3rd generation Xeon ScalableserverLGA4189-5intel.com

Feature checklist

Features required by each x86-64 level and whether Cooper Lake has them. OSFXSR and OSXSAVE are set by the operating system; the table checks the hardware features they depend on.
FeatureCooper LakeEnumerated byLinux flag
x86-64-v1
CMOVYesCPUID.01H:EDX[15]cmov
CX8YesCPUID.01H:EDX[8]cx8
FPUYesCPUID.01H:EDX[0]fpu
FXSRYesCPUID.01H:EDX[24]fxsr
MMXYesCPUID.01H:EDX[23]mmx
OSFXSR via FXSRYesCPUID.01H:EDX[24]fxsr
SCEYesCPUID.80000001H:EDX[11]syscall
SSEYesCPUID.01H:EDX[25]sse
SSE2YesCPUID.01H:EDX[26]sse2
x86-64-v2
CMPXCHG16BYesCPUID.01H:ECX[13]cx16
LAHF-SAHFYesCPUID.80000001H:ECX[0]lahf_lm
POPCNTYesCPUID.01H:ECX[23]popcnt
SSE3YesCPUID.01H:ECX[0]pni
SSE4.1YesCPUID.01H:ECX[19]sse4_1
SSE4.2YesCPUID.01H:ECX[20]sse4_2
SSSE3YesCPUID.01H:ECX[9]ssse3
x86-64-v3
AVXYesCPUID.01H:ECX[28]avx
AVX2YesCPUID.(EAX=07H,ECX=0):EBX[5]avx2
BMI1YesCPUID.(EAX=07H,ECX=0):EBX[3]bmi1
BMI2YesCPUID.(EAX=07H,ECX=0):EBX[8]bmi2
F16CYesCPUID.01H:ECX[29]f16c
FMAYesCPUID.01H:ECX[12]fma
LZCNTYesCPUID.80000001H:ECX[5]abm
MOVBEYesCPUID.01H:ECX[22]movbe
OSXSAVE via XSAVEYesCPUID.01H:ECX[26]xsave
x86-64-v4
AVX512FYesCPUID.(EAX=07H,ECX=0):EBX[16]avx512f
AVX512BWYesCPUID.(EAX=07H,ECX=0):EBX[30]avx512bw
AVX512CDYesCPUID.(EAX=07H,ECX=0):EBX[28]avx512cd
AVX512DQYesCPUID.(EAX=07H,ECX=0):EBX[17]avx512dq
AVX512VLYesCPUID.(EAX=07H,ECX=0):EBX[31]avx512vl

Other extensions

Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.

Known vulnerabilities

The CVEs that the sources of the vulnerability list name as affecting Cooper Lake, in all of its models or in some of them.

Sources

  1. GCC -march=cooperlake feature set (PTA_COOPERLAKE)
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 4, 335592-093, Table 2-1: Model 06_55H: 3rd generation Xeon Scalable processors, Cooper Lake.
  3. Intel ARK: Products formerly Cooper Lake: Launch dates; the earliest is Q2'20 (Xeon Gold 5320H); each model’s page gives its scalability as 4S or S8S.