Intel Core (client)
Core (Merom, Conroe)
Intel Core (Merom, Conroe) (2006) supports x86-64-v1.
- x86-64 level
- x86-64-v1
- Vendor
- Intel
- First products
- 2006
- Products
- Core 2 Duo, Core 2 Quad and Core 2 Extreme; Pentium Dual-Core; Xeon 3000, 3200, 5100, 5300, 7200 and 7300
- Segments
- GCC target
-march=core2
Product lines
| Product line | Segment | Socket | Source |
|---|---|---|---|
| Core 2 Duo | desktop | LGA775 | intel.com |
| Core 2 Duo | mobile | PGA478, Micro-FCBGA | intel.com |
| Core 2 Solo | mobile | Micro-FCBGA | intel.com |
| Core 2 Quad | desktop | LGA775 | intel.com |
| Core 2 Extreme | desktop | LGA775 | intel.com |
| Core 2 Extreme | mobile | PGA478 | intel.com |
| Pentium Dual-Core | desktop | LGA775 | intel.com |
| Pentium Dual-Core | mobile | PGA478 | intel.com |
| Celeron | desktop | LGA775, BGA479 | intel.com |
| Celeron | mobile | PGA478 | intel.com |
| Xeon 3000 | server | LGA775 | intel.com |
| Xeon 3200 | server | LGA775 | intel.com |
| Xeon 5100 | server | LGA771 | intel.com |
| Xeon 5300 | server | LGA771 | intel.com |
| Xeon 7300 | server | mPGA604 | intel.com |
| Xeon 7200 | server | mPGA604 | intel.com |
Why not x86-64-v2?
Core (Merom, Conroe) lacks POPCNT, SSE4.1 and SSE4.2, all of which x86-64-v2 requires.
Feature checklist
| Feature | Core (Merom, Conroe) | Enumerated by | Linux flag |
|---|---|---|---|
| x86-64-v1 | |||
| CMOV | Yes | CPUID.01H:EDX[15] | cmov |
| CX8 | Yes | CPUID.01H:EDX[8] | cx8 |
| FPU | Yes | CPUID.01H:EDX[0] | fpu |
| FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| MMX | Yes | CPUID.01H:EDX[23] | mmx |
| OSFXSR via FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| SCE | Yes | CPUID.80000001H:EDX[11] | syscall |
| SSE | Yes | CPUID.01H:EDX[25] | sse |
| SSE2 | Yes | CPUID.01H:EDX[26] | sse2 |
| x86-64-v2 | |||
| CMPXCHG16B | Yes | CPUID.01H:ECX[13] | cx16 |
| LAHF-SAHF | Yes | CPUID.80000001H:ECX[0] | lahf_lm |
| POPCNT | No | CPUID.01H:ECX[23] | popcnt |
| SSE3 | Yes | CPUID.01H:ECX[0] | pni |
| SSE4.1 | No | CPUID.01H:ECX[19] | sse4_1 |
| SSE4.2 | No | CPUID.01H:ECX[20] | sse4_2 |
| SSSE3 | Yes | CPUID.01H:ECX[9] | ssse3 |
| x86-64-v3 | |||
| AVX | No | CPUID.01H:ECX[28] | avx |
| AVX2 | No | CPUID.(EAX=07H,ECX=0):EBX[5] | avx2 |
| BMI1 | No | CPUID.(EAX=07H,ECX=0):EBX[3] | bmi1 |
| BMI2 | No | CPUID.(EAX=07H,ECX=0):EBX[8] | bmi2 |
| F16C | No | CPUID.01H:ECX[29] | f16c |
| FMA | No | CPUID.01H:ECX[12] | fma |
| LZCNT | No | CPUID.80000001H:ECX[5] | abm |
| MOVBE | No | CPUID.01H:ECX[22] | movbe |
| OSXSAVE via XSAVE | No | CPUID.01H:ECX[26] | xsave |
| x86-64-v4 | |||
| AVX512F | No | CPUID.(EAX=07H,ECX=0):EBX[16] | avx512f |
| AVX512BW | No | CPUID.(EAX=07H,ECX=0):EBX[30] | avx512bw |
| AVX512CD | No | CPUID.(EAX=07H,ECX=0):EBX[28] | avx512cd |
| AVX512DQ | No | CPUID.(EAX=07H,ECX=0):EBX[17] | avx512dq |
| AVX512VL | No | CPUID.(EAX=07H,ECX=0):EBX[31] | avx512vl |
Known vulnerabilities
The CVEs that the sources of the vulnerability list name as affecting Core (Merom, Conroe), in all of its models or in some of them.
- CVE-2019-11091 Microarchitectural Data Sampling: Microarchitectural Data Sampling Uncacheable Memory
- CVE-2019-1125 Spectre variant 1: Spectre v1 swapgs
- CVE-2018-12207 iTLB multihit: Machine Check Error Avoidance on Page Size Change
- CVE-2018-12130 Microarchitectural Data Sampling: Microarchitectural Fill Buffer Data Sampling
- CVE-2018-12127 Microarchitectural Data Sampling: Microarchitectural Load Port Data Sampling
- CVE-2018-12126 Microarchitectural Data Sampling: Microarchitectural Store Buffer Data Sampling
- CVE-2018-3646 L1 Terminal Fault: L1 Terminal Fault: virtualization
- CVE-2018-3639 Speculative Store Bypass
- CVE-2018-3620 L1 Terminal Fault: L1 Terminal Fault: operating systems and SMM
- CVE-2018-3615 L1 Terminal Fault: L1 Terminal Fault: SGX
- CVE-2017-5754 Meltdown: Rogue Data Cache Load
- CVE-2017-5753 Spectre variant 1: Bounds Check Bypass
- CVE-2017-5715 Spectre variant 2: Branch Target Injection
Other Intel Core (client) microarchitectures
- NetBurst (Prescott, Nocona) 2004 v1
- Core (Merom, Conroe) 2006 v1
- Penryn 2007 v1
- Nehalem 2008 v2
- Westmere 2010 v2
- Sandy Bridge 2011 v2
- Ivy Bridge 2012 v2
- Haswell 2013 v3
- Broadwell 2014 v3
- Skylake 2015 v3
- Kaby Lake 2016 v3
- Coffee Lake 2017 v3
- Cannon Lake 2018 v4
- Comet Lake 2019 v3
- Ice Lake (client) 2019 v4
- Tiger Lake 2020 v4
- Alder Lake 2021 v3
- Rocket Lake 2021 v4
- Raptor Lake 2022 v3
- Meteor Lake 2023 v3
- Arrow Lake 2024 v3
- Lunar Lake 2024 v3
- Panther Lake 2026 v3
- Nova Lake announced v4
Sources
- GCC -march=core2 feature set (PTA_CORE2)
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, 253665-093, Sections 1.1 and 2.1.12: Names the Core 2, Pentium Dual-Core and Xeon 3000 to 7300 series as based on the Intel Core microarchitecture, under 2006.
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 4, 335592-093, Table 2-1: Model 06_0FH: Xeon 3000, 3200, 5100, 5300 and 7300, Core 2 Quad, Extreme and Duo, Pentium dual-core.
- Intel Microprocessor Quick Reference Guide, Intel Core 2 processor: The first Core 2 Duo and Core 2 Extreme models (E6300 to E6700, X6800) were introduced in July 2006.
- GCC gcc/common/config/i386/cpuinfo.h: Merom (model 0FH) selects -march=core2
- Linux 7.3 arch/x86/include/asm/intel-family.h: INTEL_CORE2_MEROM: Family 6 model 0FH is Merom.
- Intel ARK: Products formerly Merom (archived January 2025): Lists the mobile Core 2 Duo, Core 2 Solo and Core 2 Extreme X7800 and X7900, the Pentium T2310 to T3400 and the Celeron M and Celeron 520 to 585, T1600 and T1700.
- Intel ARK: Products formerly Conroe (archived December 2024): Lists the Core 2 Duo E4300 to E6850, the Core 2 Extreme X6800, the Xeon 3040 to 3070, the Pentium E2140 to E2220 and the Celeron 220, 420 to 450 and E1200 to E1600.