Intel Atom and E-cores
Saltwell
Intel Saltwell (2011) supports x86-64-v1.
- x86-64 level
- x86-64-v1
- Vendor
- Intel
- First products
- 2011
- Products
- Atom N2000 and D2000 (Cedarview), Atom Z2000
- GCC target
-march=bonnell
A die shrink of Bonnell with the same instruction set; GCC has no separate -march for it.
Why not x86-64-v2?
Saltwell lacks POPCNT, SSE4.1 and SSE4.2, all of which x86-64-v2 requires.
Feature checklist
| Feature | Saltwell | Enumerated by | Linux flag |
|---|---|---|---|
| x86-64-v1 | |||
| CMOV | Yes | CPUID.01H:EDX[15] | cmov |
| CX8 | Yes | CPUID.01H:EDX[8] | cx8 |
| FPU | Yes | CPUID.01H:EDX[0] | fpu |
| FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| MMX | Yes | CPUID.01H:EDX[23] | mmx |
| OSFXSR via FXSR | Yes | CPUID.01H:EDX[24] | fxsr |
| SCE | Yes | CPUID.80000001H:EDX[11] | syscall |
| SSE | Yes | CPUID.01H:EDX[25] | sse |
| SSE2 | Yes | CPUID.01H:EDX[26] | sse2 |
| x86-64-v2 | |||
| CMPXCHG16B | Yes | CPUID.01H:ECX[13] | cx16 |
| LAHF-SAHF | Yes | CPUID.80000001H:ECX[0] | lahf_lm |
| POPCNT | No | CPUID.01H:ECX[23] | popcnt |
| SSE3 | Yes | CPUID.01H:ECX[0] | pni |
| SSE4.1 | No | CPUID.01H:ECX[19] | sse4_1 |
| SSE4.2 | No | CPUID.01H:ECX[20] | sse4_2 |
| SSSE3 | Yes | CPUID.01H:ECX[9] | ssse3 |
| x86-64-v3 | |||
| AVX | No | CPUID.01H:ECX[28] | avx |
| AVX2 | No | CPUID.(EAX=07H,ECX=0):EBX[5] | avx2 |
| BMI1 | No | CPUID.(EAX=07H,ECX=0):EBX[3] | bmi1 |
| BMI2 | No | CPUID.(EAX=07H,ECX=0):EBX[8] | bmi2 |
| F16C | No | CPUID.01H:ECX[29] | f16c |
| FMA | No | CPUID.01H:ECX[12] | fma |
| LZCNT | No | CPUID.80000001H:ECX[5] | abm |
| MOVBE | Yes | CPUID.01H:ECX[22] | movbe |
| OSXSAVE via XSAVE | No | CPUID.01H:ECX[26] | xsave |
| x86-64-v4 | |||
| AVX512F | No | CPUID.(EAX=07H,ECX=0):EBX[16] | avx512f |
| AVX512BW | No | CPUID.(EAX=07H,ECX=0):EBX[30] | avx512bw |
| AVX512CD | No | CPUID.(EAX=07H,ECX=0):EBX[28] | avx512cd |
| AVX512DQ | No | CPUID.(EAX=07H,ECX=0):EBX[17] | avx512dq |
| AVX512VL | No | CPUID.(EAX=07H,ECX=0):EBX[31] | avx512vl |