x86-64 level
x86-64-v2
Vendor
Intel
First products
2011
Products
2nd generation Core; Xeon E3-1200 and E5
Segments
desktopmobileworkstationserverembedded
GCC target
-march=sandybridge
Optimization
Optimizing code for Sandy Bridge and Ivy Bridge

Product lines

The product lines built on Sandy Bridge, with the market segment the vendor sells each in and the sockets or soldered (BGA) packages its processors come in. Each socket links to the vendor page that states it.
Product lineSegmentSocketSource
2nd generation CoredesktopLGA1155intel.com
2nd generation CoremobilerPGA988B, BGA1023, BGA1224intel.com
2nd generation CoreembeddedBGA1023intel.com
Core i7 and Core i7 Extreme (Sandy Bridge-E)ARK lists it as Desktop; HEDT counts as workstation here.workstationLGA2011intel.com
Pentium and CelerondesktopLGA1155intel.com
Pentium 1400serverLGA1356intel.com
Xeon E3-1200serverLGA1155intel.com
Xeon E5-1600, E5-2600 and E5-4600serverLGA2011intel.com
Xeon E5-1600, E5-2600 and E5-4600embeddedLGA2011intel.com
Xeon E5-1400 and E5-2400serverLGA1356intel.com
Xeon E5-1400 and E5-2400embeddedLGA1356intel.com

Why not x86-64-v3?

Sandy Bridge lacks AVX2, BMI1, BMI2, F16C, FMA, LZCNT and MOVBE, all of which x86-64-v3 requires.

Feature checklist

Features required by each x86-64 level and whether Sandy Bridge has them. OSFXSR and OSXSAVE are set by the operating system; the table checks the hardware features they depend on.
FeatureSandy BridgeEnumerated byLinux flag
x86-64-v1
CMOVYesCPUID.01H:EDX[15]cmov
CX8YesCPUID.01H:EDX[8]cx8
FPUYesCPUID.01H:EDX[0]fpu
FXSRYesCPUID.01H:EDX[24]fxsr
MMXYesCPUID.01H:EDX[23]mmx
OSFXSR via FXSRYesCPUID.01H:EDX[24]fxsr
SCEYesCPUID.80000001H:EDX[11]syscall
SSEYesCPUID.01H:EDX[25]sse
SSE2YesCPUID.01H:EDX[26]sse2
x86-64-v2
CMPXCHG16BYesCPUID.01H:ECX[13]cx16
LAHF-SAHFYesCPUID.80000001H:ECX[0]lahf_lm
POPCNTYesCPUID.01H:ECX[23]popcnt
SSE3YesCPUID.01H:ECX[0]pni
SSE4.1YesCPUID.01H:ECX[19]sse4_1
SSE4.2YesCPUID.01H:ECX[20]sse4_2
SSSE3YesCPUID.01H:ECX[9]ssse3
x86-64-v3
AVXYesCPUID.01H:ECX[28]avx
AVX2NoCPUID.(EAX=07H,ECX=0):EBX[5]avx2
BMI1NoCPUID.(EAX=07H,ECX=0):EBX[3]bmi1
BMI2NoCPUID.(EAX=07H,ECX=0):EBX[8]bmi2
F16CNoCPUID.01H:ECX[29]f16c
FMANoCPUID.01H:ECX[12]fma
LZCNTNoCPUID.80000001H:ECX[5]abm
MOVBENoCPUID.01H:ECX[22]movbe
OSXSAVE via XSAVEYesCPUID.01H:ECX[26]xsave
x86-64-v4
AVX512FNoCPUID.(EAX=07H,ECX=0):EBX[16]avx512f
AVX512BWNoCPUID.(EAX=07H,ECX=0):EBX[30]avx512bw
AVX512CDNoCPUID.(EAX=07H,ECX=0):EBX[28]avx512cd
AVX512DQNoCPUID.(EAX=07H,ECX=0):EBX[17]avx512dq
AVX512VLNoCPUID.(EAX=07H,ECX=0):EBX[31]avx512vl

Other extensions

Notable extensions outside the x86-64 levels. Vendors sometimes disable these on individual models. Linked names lead to the extension's instructions.

Known vulnerabilities

The CVEs that the sources of the vulnerability list name as affecting Sandy Bridge, in all of its models or in some of them.

Sources

  1. GCC -march=sandybridge feature set (PTA_SANDYBRIDGE)
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1, 253665-093, Section 2.1.20: The 2nd generation Core processors (2011) and the Xeon E3-1200 and E5 families are based on Sandy Bridge.
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 4, 335592-093, Table 2-1: Models 06_2AH and 06_2DH: 2nd generation Core i7, i5 and i3, Xeon E3-1200 and E5.
  4. Intel ARK: Products formerly Sandy Bridge: Launch dates; the earliest is Q1'11 (Core i7-2655LE).