Name
RAPL energy reporting
Also known as
Platypus
Vulnerability
RAPL Energy Reporting
Kind
Side channel
CVE published
2020-11-12 CVE record
Advisories
INTEL-SA-00389
A privileged attacker, such as a malicious operating system, can read the RAPL energy MSRs while an SGX enclave works and infer its data from the energy used. Intel’s fix filters the values the processor reports through MSR_PKG_ENERGY_STATUS and MSR_PP0_ENERGY_STATUS when SGX is on, and the microcode must be loaded from the firmware’s FIT for that. Readings over one second differ from the real ones by under 2% typically, over 100 ms by 5 to 15%, which matters to power management software.

Affected processors

15 of the 27 microarchitectures listed are affected in all or some of their models.

What the sources say of each microarchitecture. Intel’s list gives each CPUID family, model and stepping it covers, with Intel’s mitigation for it (Software, MCU for a microcode update, or Hardware).
MicroarchitectureStatusDetailSource
HaswellAffected06_3FH stepping 2 (Haswell Server EP/EP4S): No planned mitigation
06_3FH stepping 4 (Haswell Server EX): No planned mitigation
Intel’s list
SkylakeAffected06_5EH stepping 3 (1. Skylake Xeon E3 - 2. Skylake H - 3. Skylake S): MCUIntel’s list
Kaby LakeAffected06_8EH stepping 9 (1. Amber Lake-Y - 2. Kaby Lake U - 3. Kaby Lake U23e - 4. Kaby Lake Y): MCU
06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU
06_9EH stepping 9 (1. Kaby Lake S - 2. Kaby Lake Xeon E3): MCU
Intel’s list
Coffee LakeAffected06_8EH stepping A (1. Coffee Lake U43e - 2. Whiskey Lake): MCU
06_8EH stepping B (Whiskey Lake U): MCU
06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU
06_9EH stepping A (Coffee Lake H): MCU
06_9EH stepping C (Coffee Lake S): MCU
06_9EH stepping D (1. Coffee Lake H - 2. Coffee Lake Xeon E - 3. Coffee Lake S): MCU
Intel’s list
Comet LakeAffected06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU
06_A5H stepping 2 (Comet Lake H): MCU
06_A5H stepping 3 (Comet Lake-S): MCU
06_A5H stepping 5 (Comet Lake-S): MCU
06_A6H stepping 0 (Comet Lake U62): MCU
06_A6H stepping 1 (Comet Lake U62): MCU
Intel’s list
Ice Lake (client)Affected06_7EH stepping 5 (Ice Lake U - Ice Lake Y): MCUIntel’s list
Alder LakeAffected06_97H stepping 2 (Alder Lake S (Golden Cove - Gracemont)): MCU
06_97H stepping 5 (Alder Lake S (Golden Cove - Gracemont)): MCU
06_97H stepping 5 (Catlow (Golden Cove)): MCU
06_9AH stepping 3 (1. Alder Lake H (Golden Cove - Gracemont) - 2. Alder Lake P (Golden Cove - Gracemont)): MCU
06_9AH stepping 4 (Alder Lake U (Golden Cove - Gracemont)): MCU
Intel’s list
Skylake-SPAffected06_55H stepping 3 (Skylake Server): MCU
06_55H stepping 4 (1. Skylake Server - 2. Skylake D/Bakerville): MCU
Intel’s list
Cooper LakeAffected06_55H stepping B (Cooper Lake): MCUIntel’s list
Ice Lake (server)Affected06_6AH stepping 6 (Ice Lake Xeon-SP): MCU
06_6CH stepping All (Ice Lake Xeon D (Idaville)): MCU
Intel’s list
GoldmontAffected06_5CH stepping A (Apollo Lake): MCU
06_5FH stepping All (Denverton (Goldmont)): MCU
Intel’s list
Goldmont PlusAffected06_7AH stepping 8 (Gemini Lake): MCUIntel’s list
BroadwellSome models06_4FH stepping 1 (1. Broadwell Server E/EP/EP4S - 2. Broadwell Server EX): No planned mitigation
06_56H stepping 3 (Broadwell DE V2 - V3): Not Affected
06_56H stepping 4 (Broadwell DE Y0): No planned mitigation
06_56H stepping 5 (Hewitt Lake (Broadwell DE)): No planned mitigation
Intel’s list
Tiger LakeSome models06_8CH stepping 1 (Tiger Lake U): MCU
06_8CH stepping 1 (Tiger Lake U): MCU
06_8CH stepping 2 (1. Tiger Lake U Refresh - 2. Tiger Lake H35): Not Affected
06_8DH stepping 1 (Tiger Lake H): MCU
06_8DH stepping 1 (Tiger Lake H): MCU
Intel’s list
TremontSome models06_86H stepping 5 (Snow Ridge BTS (Tremont)): MCU
06_86H stepping 7 (Parker Ridge / Snow Ridge NS/NX/BTS): MCU
06_96H stepping All (Elkhart Lake (Tremont)): Not Affected
06_9CH stepping All (Jasper Lake (Tremont)): MCU
Intel’s list
Rocket LakeNot affected06_A7H stepping 1 (Rocket Lake): Not AffectedIntel’s list
Raptor LakeNot affected06_B7H stepping 1 (1. Raptor Lake S - 2. Raptor Lake HX (Raptor Cove/Gracemont)): Not Affected
06_B7H stepping 1 (Catlow (Raptor Cove)): Not Affected
06_BAH stepping 2 - 3 - 8 (1. Raptor Lake P - 2. Raptor Lake H + refresh - 3. Raptor Lake U + refresh (Raptor Cove/Gracemont)): Not Affected
06_BFH stepping 2 - 5 (Raptor Lake S (Raptor Cove/Gracemont)): Not Affected
Intel’s list
Meteor LakeNot affected06_AAH stepping 4 (Meteor Lake U/H/PS (Redwood Cove - Crestmont)): Not AffectedIntel’s list
Arrow LakeNot affected06_B5H stepping 0 (Arrow Lake U (Redwood Cove - Crestmont)): Not Affected
06_C5H stepping 2 (Arrow Lake H (Lion Cove - Skymont)): Not Affected
06_C6H stepping 2 (Arrow Lake H/HX/S/S Plus (Lion Cove - Skymont)): Not Affected
Intel’s list
Lunar LakeNot affected06_BDH stepping 1 (Lunar Lake (Lion Cove - Skymont)): Not AffectedIntel’s list
Panther LakeNot affected06_CCH stepping 2 - 3 (Panther Lake (Cougar Cove - Darkmont)): Not AffectedIntel’s list
Emerald RapidsNot affected06_CFH stepping 2 (Emerald Rapids (Raptor Cove)): Not AffectedIntel’s list
Sapphire RapidsNot affected06_8FH stepping 5 - 6 - 7 - 8 (1. Sapphire Rapids - 2. Sapphire Rapids Edge Enhanced (Golden Cove)): Not Affected
06_8FH stepping 5 - 6 - 8 (Sapphire Rapids (Golden Cove) - Sapphire Rapids HBM): Not Affected
Intel’s list
Granite RapidsNot affected06_ADH stepping 1 (Granite Rapids (Redwood Cove)): Not Affected
06_ADH stepping 1 (Granite Rapids (Redwood Cove)): Not Affected
06_ADH stepping 1 (Granite Rapids R1S (Redwood Cove)): Not Affected
06_AEH stepping 1 (Granite Rapids D (Redwood Cove)/Kaseyville): Not Affected
Intel’s list
Sierra ForestNot affected06_AFH stepping 3 (Sierra Forest (Crestmont)): Not AffectedIntel’s list
Clearwater ForestNot affected06_DDH stepping 1 (Clearwater Forest (Darkmont)): Not AffectedIntel’s list
GracemontNot affected06_9AH stepping 4 (Arizona Beach (Gracemont)): Not Affected
06_BEH stepping 0 (Alder Lake N (Gracemont)/Twin Lake): Not Affected
Intel’s list

Mitigations

  • Microcode: Filtered energy reporting: with SGX on, or when software sets ENERGY_FILTERING_ENABLE in IA32_MISC_PACKAGE_CTLS, the energy status MSRs report values with added noise; the 2021.2 microcode replaced the first, 2020.2, method. Instructions: RDMSR, WRMSR. Source.

Sources

  1. Intel: Running Average Power Limit Energy Reporting
  2. INTEL-SA-00389: 2020.2 IPU - Intel RAPL Interface Advisory