Processor vulnerability
CVE-2024-45332
Some updates to the indirect branch predictor are applied late, after a switch to supervisor mode or a barrier, so user code can steer kernel branches.
- Name
- Indirect Branch Predictor Delayed Updates
- Also known as
- Branch Privilege Injection
- Vulnerability
- Branch Privilege Injection
- Kind
- Transient execution
- CVE published
- 2025-05-13 CVE record
- Advisories
- INTEL-SA-01247
On processors with enhanced IBRS, predictions are meant to be tagged
with the privilege mode in which they were made. Researchers at ETH
Zurich found that some updates of the indirect branch predictor are
delayed until after a mode switch, such as from user to supervisor,
or after a prediction barrier, so they take effect in the wrong
context. That weakens the hardware mitigation for branch target
injection (Spectre v2) on processors that support enhanced IBRS.What the sources say of each microarchitecture. Intel’s list gives each CPUID family, model and stepping it covers, with Intel’s mitigation for it (Software, MCU for a microcode update, or Hardware).
Affected processors
17 of the 27 microarchitectures listed are affected in all or some of their models.
| Microarchitecture | Status | Detail | Source |
|---|---|---|---|
| Comet Lake | Affected | 06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU 06_A5H stepping 2 (Comet Lake H): MCU 06_A5H stepping 3 (Comet Lake-S): MCU 06_A5H stepping 5 (Comet Lake-S): MCU 06_A6H stepping 0 (Comet Lake U62): MCU 06_A6H stepping 1 (Comet Lake U62): MCU | Intel’s list |
| Ice Lake (client) | Affected | 06_7EH stepping 5 (Ice Lake U - Ice Lake Y): MCU | Intel’s list |
| Tiger Lake | Affected | 06_8CH stepping 1 (Tiger Lake U): MCU 06_8CH stepping 1 (Tiger Lake U): MCU 06_8CH stepping 2 (1. Tiger Lake U Refresh - 2. Tiger Lake H35): MCU 06_8DH stepping 1 (Tiger Lake H): MCU 06_8DH stepping 1 (Tiger Lake H): MCU | Intel’s list |
| Alder Lake | Affected | 06_97H stepping 2 (Alder Lake S (Golden Cove - Gracemont)): MCU 06_97H stepping 5 (Alder Lake S (Golden Cove - Gracemont)): MCU 06_97H stepping 5 (Catlow (Golden Cove)): MCU 06_9AH stepping 3 (1. Alder Lake H (Golden Cove - Gracemont) - 2. Alder Lake P (Golden Cove - Gracemont)): MCU 06_9AH stepping 4 (Alder Lake U (Golden Cove - Gracemont)): MCU | Intel’s list |
| Rocket Lake | Affected | 06_A7H stepping 1 (Rocket Lake): MCU | Intel’s list |
| Raptor Lake | Affected | 06_B7H stepping 1 (1. Raptor Lake S - 2. Raptor Lake HX (Raptor Cove/Gracemont)): MCU 06_B7H stepping 1 (Catlow (Raptor Cove)): MCU 06_BAH stepping 2 - 3 - 8 (1. Raptor Lake P - 2. Raptor Lake H + refresh - 3. Raptor Lake U + refresh (Raptor Cove/Gracemont)): MCU 06_BFH stepping 2 - 5 (Raptor Lake S (Raptor Cove/Gracemont)): MCU | Intel’s list |
| Meteor Lake | Affected | 06_AAH stepping 4 (Meteor Lake U/H/PS (Redwood Cove - Crestmont)): MCU | Intel’s list |
| Arrow Lake | Affected | 06_B5H stepping 0 (Arrow Lake U (Redwood Cove - Crestmont)): MCU 06_C5H stepping 2 (Arrow Lake H (Lion Cove - Skymont)): MCU 06_C6H stepping 2 (Arrow Lake H/HX/S/S Plus (Lion Cove - Skymont)): MCU | Intel’s list |
| Lunar Lake | Affected | 06_BDH stepping 1 (Lunar Lake (Lion Cove - Skymont)): MCU | Intel’s list |
| Cooper Lake | Affected | 06_55H stepping B (Cooper Lake): MCU | Intel’s list |
| Ice Lake (server) | Affected | 06_6AH stepping 6 (Ice Lake Xeon-SP): MCU 06_6CH stepping All (Ice Lake Xeon D (Idaville)): MCU | Intel’s list |
| Emerald Rapids | Affected | 06_CFH stepping 2 (Emerald Rapids (Raptor Cove)): MCU | Intel’s list |
| Sapphire Rapids | Affected | 06_8FH stepping 5 - 6 - 7 - 8 (1. Sapphire Rapids - 2. Sapphire Rapids Edge Enhanced (Golden Cove)): MCU 06_8FH stepping 5 - 6 - 8 (Sapphire Rapids (Golden Cove) - Sapphire Rapids HBM): MCU | Intel’s list |
| Goldmont Plus | Affected | 06_7AH stepping 8 (Gemini Lake): MCU | Intel’s list |
| Gracemont | Affected | 06_9AH stepping 4 (Arizona Beach (Gracemont)): MCU 06_BEH stepping 0 (Alder Lake N (Gracemont)/Twin Lake): MCU | Intel’s list |
| Kaby Lake | Some models | 06_8EH stepping 9 (1. Amber Lake-Y - 2. Kaby Lake U - 3. Kaby Lake U23e - 4. Kaby Lake Y): Not Affected 06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU 06_9EH stepping 9 (1. Kaby Lake S - 2. Kaby Lake Xeon E3): Not Affected | Intel’s list |
| Coffee Lake | Some models | 06_8EH stepping A (1. Coffee Lake U43e - 2. Whiskey Lake): MCU 06_8EH stepping B (Whiskey Lake U): MCU 06_8EH stepping C (1. Whiskey Lake V - 2. Comet Lake U42 - 3. Amber Lake Y): MCU 06_9EH stepping A (Coffee Lake H): Not Affected 06_9EH stepping C (Coffee Lake S): Not Affected 06_9EH stepping D (1. Coffee Lake H - 2. Coffee Lake Xeon E - 3. Coffee Lake S): MCU | Intel’s list |
| Haswell | Not affected | 06_3FH stepping 2 (Haswell Server EP/EP4S): Not Affected 06_3FH stepping 4 (Haswell Server EX): Not Affected | Intel’s list |
| Broadwell | Not affected | 06_4FH stepping 1 (1. Broadwell Server E/EP/EP4S - 2. Broadwell Server EX): Not Affected 06_56H stepping 3 (Broadwell DE V2 - V3): Not Affected 06_56H stepping 4 (Broadwell DE Y0): Not Affected 06_56H stepping 5 (Hewitt Lake (Broadwell DE)): Not Affected | Intel’s list |
| Skylake | Not affected | 06_5EH stepping 3 (1. Skylake Xeon E3 - 2. Skylake H - 3. Skylake S): Not Affected | Intel’s list |
| Panther Lake | Not affected | 06_CCH stepping 2 - 3 (Panther Lake (Cougar Cove - Darkmont)): Not Affected | Intel’s list |
| Skylake-SP | Not affected | 06_55H stepping 3 (Skylake Server): Not Affected 06_55H stepping 4 (1. Skylake Server - 2. Skylake D/Bakerville): Not Affected | Intel’s list |
| Granite Rapids | Not affected | 06_ADH stepping 1 (Granite Rapids (Redwood Cove)): Not Affected 06_ADH stepping 1 (Granite Rapids (Redwood Cove)): Not Affected 06_ADH stepping 1 (Granite Rapids R1S (Redwood Cove)): Not Affected 06_AEH stepping 1 (Granite Rapids D (Redwood Cove)/Kaseyville): Not Affected | Intel’s list |
| Sierra Forest | Not affected | 06_AFH stepping 3 (Sierra Forest (Crestmont)): Not Affected | Intel’s list |
| Clearwater Forest | Not affected | 06_DDH stepping 1 (Clearwater Forest (Darkmont)): Not Affected | Intel’s list |
| Goldmont | Not affected | 06_5CH stepping A (Apollo Lake): Not Affected 06_5FH stepping All (Denverton (Goldmont)): Not Affected | Intel’s list |
| Tremont | Not affected | 06_86H stepping 5 (Snow Ridge BTS (Tremont)): Not Affected 06_86H stepping 7 (Parker Ridge / Snow Ridge NS/NX/BTS): Not Affected 06_96H stepping All (Elkhart Lake (Tremont)): Not Affected 06_9CH stepping All (Jasper Lake (Tremont)): Not Affected | Intel’s list |
Mitigations
- Microcode: Intel's microcode update of May 2025, which makes the predictor's updates take effect in time; Intel saw an impact only in microbenchmarks of back-to-back system calls. Source.
Related CVEs
- CVE-2024-43420 Shared predictor state: Atom
- CVE-2025-20623 Shared predictor state: 10th generation Core