BSRMOVH

BSRMOVH moves the upper half of ACE’s block scale register, bits 1023:512, which hold the A scales for the rows of an outer product, to or from a ZMM register or 64 bytes of memory. W1 is the write form, bsrmovh bsr0, zmm1/m512, and leaves the B scales in the lower half as they were; W0 the read form, bsrmovh zmm1/m512, bsr0. BSRMOVL does the same for the lower half, and BSRMOVF, whose page shows which byte scales which element, loads both halves at once.

One side at a time#

An outer product combines a row scale and a column scale for each element of the tile. When a loop moves on to new rows of A while the columns of B stay, only the A scales change, and BSRMOVH replaces them without reloading B’s. The read forms are the only way to see the scales apart from saving the register: XSAVE stores it as the SCALEDATA component, XCR0 bit 20, 128 bytes.

Encoding and checks#

EVEX opcode 95h in map 6 with the F2 prefix, 512 bits only; BSRMOVL has F3, BSRMOVF no prefix. ModRM.reg must be 000 for bsr0 and EVEX.vvvv 1111b, with no mask, broadcast or zeroing, under exception class ACE-E3. It needs 64-bit mode, the tile, scale and AVX-512 state in XCR0 and a tile configuration with palette 2, or raises #UD; CR0.TS or bit 18 of IA32_XFD raises #NM.

In our builds#

GNU as 2.44 and Clang 23 reject the mnemonic, and neither compiler has ACE’s intrinsics _bsrmovh(a_scales) and _bsrmovh_r(), for the two directions. No processor at hand has ACE, so this site’s recorded cases include none of BSRMOVH.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 0xB != 0xB:            # TILECFG, TILEDATA, SCALEDATA
    fault(UD)
if on & 0xE6 != 0xE6:                # AVX-512's state, AVX's and
    fault(UD)                        # SSE's
if palette != 2:                     # ACE's palette alone
    fault(UD)
if cr0 >> 3 & 1 or xfd >> 18 & 1:    # CR0.TS, or the OS keeps the
    fault(NM)                        # tiles from this thread
bsr0.write(src2 << 512 | low(bsr0, 512))

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 0xB != 0xB:            # TILECFG, TILEDATA, SCALEDATA
    fault(UD)
if on & 0xE6 != 0xE6:                # AVX-512's state, AVX's and
    fault(UD)                        # SSE's
if palette != 2:                     # ACE's palette alone
    fault(UD)
if cr0 >> 3 & 1 or xfd >> 18 & 1:    # CR0.TS, or the OS keeps the
    fault(NM)                        # tiles from this thread
dest.write(bsr0 >> 512)              # the A scales

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

ACE-E3

Attributes

What else XED records about the forms. How to read.

All forms

may abort a TSX transaction

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More ACE instructions

• BSRINIT
• BSRMOVF
• BSRMOVL
• LDTILECFG
• STTILECFG
• TCVTROWD2PS
• TCVTROWPS2BF16H
• TCVTROWPS2BF16L
• TCVTROWPS2PHH
• TCVTROWPS2PHL
• TILEMOVCOL
• TILEMOVROW
• TILERELEASE
• TILEZERO
• TOP2BF16PS
• TOP4BSSD
• TOP4BSUD
• TOP4BUSD
• TOP4BUUD
• TOP4MXBF8PS
• TOP4MXBHF8PS
• TOP4MXBSSPS
• TOP4MXHBF8PS
• TOP4MXHF8PS