BSRMOVL

BSRMOVL moves the lower half of ACE’s block scale register, bits 511:0, which hold the B scales for the columns of an outer product, to or from a ZMM register or 64 bytes of memory. W1 is the write form, bsrmovl bsr0, zmm1/m512, and leaves the A scales in the upper half as they were; W0 the read form, bsrmovl zmm1/m512, bsr0. It is the lower-half twin of BSRMOVH, whose page covers the checks and the reasons to move one half alone, and BSRMOVF, whose page shows which byte scales which column, loads both halves at once.

Scales for B#

Dword s of the half belongs to column s of the tile, and its four bytes are that column’s scales in groups 0 to 3, of which an MX outer product such as TOP4MXHF8PS takes the one that bits 4:3 of its immediate select. After BSRINIT every byte is 7Fh, a scale of 1.0, so a read gives 64 bytes of 7Fh. The encoding is EVEX opcode 95h in map 6 with the F3 prefix, 512 bits only, under exception class ACE-E3, like BSRMOVH’s with F2.

In our builds#

GNU as 2.44 and Clang 23 reject the mnemonic, and neither compiler has ACE’s intrinsics _bsrmovl(b_scales) and _bsrmovl_r(), for the two directions. No processor at hand has ACE, so this site’s recorded cases include none of BSRMOVL.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 0xB != 0xB:            # TILECFG, TILEDATA, SCALEDATA
    fault(UD)
if on & 0xE6 != 0xE6:                # AVX-512's state, AVX's and
    fault(UD)                        # SSE's
if palette != 2:                     # ACE's palette alone
    fault(UD)
if cr0 >> 3 & 1 or xfd >> 18 & 1:    # CR0.TS, or the OS keeps the
    fault(NM)                        # tiles from this thread
bsr0.write(bsr0 >> 512 << 512 | src2)

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 0xB != 0xB:            # TILECFG, TILEDATA, SCALEDATA
    fault(UD)
if on & 0xE6 != 0xE6:                # AVX-512's state, AVX's and
    fault(UD)                        # SSE's
if palette != 2:                     # ACE's palette alone
    fault(UD)
if cr0 >> 3 & 1 or xfd >> 18 & 1:    # CR0.TS, or the OS keeps the
    fault(NM)                        # tiles from this thread
dest.write(low(bsr0, 512))           # the B scales

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

ACE-E3

Attributes

What else XED records about the forms. How to read.

All forms

may abort a TSX transaction

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More ACE instructions

• BSRINIT
• BSRMOVF
• BSRMOVH
• LDTILECFG
• STTILECFG
• TCVTROWD2PS
• TCVTROWPS2BF16H
• TCVTROWPS2BF16L
• TCVTROWPS2PHH
• TCVTROWPS2PHL
• TILEMOVCOL
• TILEMOVROW
• TILERELEASE
• TILEZERO
• TOP2BF16PS
• TOP4BSSD
• TOP4BSUD
• TOP4BUSD
• TOP4BUUD
• TOP4MXBF8PS
• TOP4MXBHF8PS
• TOP4MXBSSPS
• TOP4MXHBF8PS
• TOP4MXHF8PS