x86-64.net

Instruction

CALL

Pushes the return address and jumps to a relative target, one in a register or memory, or a far pointer that also changes the code segment.

Extensions
Forms
6 (6 Legacy)
Data
Intel XED v2026.08.23

Forms

Every encoding of CALL that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
CALL m16/32/64 CALL_NEAR_MEMvFF /2Base instruction set
CALL r16/32/64 CALL_NEAR_GPRvFF /2Base instruction set
CALL rel16/32 not in 64-bit mode CALL_NEAR_RELBRzE8 cw/cdBase instruction set
CALL rel32 64-bit mode only CALL_NEAR_RELBRdE8 cdBase instruction set
CALL m16:16/32/64 CALL_FAR_MEMp2FF /3Base instruction set
CALL ptr16:16/32 not in 64-bit mode CALL_FAR_PTRp_IMMw9A cw/cd iwBase instruction set

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
I86

No CPUID bit: part of the base instruction set.

Every x86-64 processor in XED’s model

More General-purpose instructions

All 109 General-purpose instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.