Instruction
CMP
Compares two operands by subtracting the second from the first, setting the arithmetic flags as SUB would and discarding the result.
- Extensions
- Forms
- 18 (18 Legacy)
- Data
- Intel XED v2026.08.23
Forms
| Instruction | Encoding | Requires |
|---|---|---|
CMP m8, imm8
CMP_MEMb_IMMb_80r7 | 80 /7 ib | Base instruction set |
CMP r8, imm8
CMP_GPR8_IMMb_80r7 | 80 /7 ib | Base instruction set |
CMP m16/32/64, imm16/32
CMP_MEMv_IMMz | 81 /7 iw/id | Base instruction set |
CMP r16/32/64, imm16/32
CMP_GPRv_IMMz | 81 /7 iw/id | Base instruction set |
CMP m8, imm8 not in 64-bit mode
CMP_MEMb_IMMb_82r7 | 82 /7 ib | Base instruction set |
CMP r8, imm8 not in 64-bit mode
CMP_GPR8_IMMb_82r7 | 82 /7 ib | Base instruction set |
CMP m16/32/64, imm8
CMP_MEMv_IMMb | 83 /7 ib | Base instruction set |
CMP r16/32/64, imm8
CMP_GPRv_IMMb | 83 /7 ib | Base instruction set |
CMP m8, r8
CMP_MEMb_GPR8 | 38 /r | Base instruction set |
CMP r8, r8
CMP_GPR8_GPR8_38 | 38 /r | Base instruction set |
CMP m16/32/64, r16/32/64
CMP_MEMv_GPRv | 39 /r | Base instruction set |
CMP r16/32/64, r16/32/64
CMP_GPRv_GPRv_39 | 39 /r | Base instruction set |
CMP r8, m8
CMP_GPR8_MEMb | 3A /r | Base instruction set |
CMP r8, r8
CMP_GPR8_GPR8_3A | 3A /r | Base instruction set |
CMP r16/32/64, m16/32/64
CMP_GPRv_MEMv | 3B /r | Base instruction set |
CMP r16/32/64, r16/32/64
CMP_GPRv_GPRv_3B | 3B /r | Base instruction set |
CMP AL, imm8
CMP_AL_IMMb | 3C ib | Base instruction set |
CMP rAX, imm16/32
CMP_OrAX_IMMz | 3D iw/id | Base instruction set |
CPUID and processors
Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.
| ISA set | CPUID | Processors in XED |
|---|---|---|
I86 | No CPUID bit: part of the base instruction set. | Every x86-64 processor in XED’s model |
More General-purpose instructions
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.