Class
APX-LEGACY-JMPABS in Intel XED
Applies to
JMPABS (APX): a REX2 prefix with M0 = 0 and W = 0, the opcode A1H and an 8-byte target.
Instructions
1 mnemonic, 1 form
Data
Intel XED v2026.08.23

Exception conditions

When an instruction of the class raises each exception, and in which processor modes. Protected mode includes compatibility mode. How to read the table.
ExceptionRealVirtual-8086Protected64-bitCondition
#UDyesyesyesnoAlways: JMPABS exists only in 64-bit mode.
#UDnononoyesXCR0 bit 19 (APX) or CR4.OSXSAVE is 0: the operating system has not enabled APX.
#UDnononoyesA LOCK, 66H, 67H, F2H, F3H or REX prefix comes before it.
#UDnononoyesCPUID reports no APX_F.
#GP(0)nononoyesThe target address is not canonical.

Notes

Outside 64-bit mode, D5H, the first byte of a REX2 prefix, is the opcode of AAD, so the bytes of a JMPABS decode as other instructions there. In 64-bit mode segment overrides are allowed and ignored, and the same encoding with REX2.W = 1 raises #UD.

Instructions

Intel XED puts forms of 1 mnemonic in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.

APX

Sources

  1. Intel Advanced Performance Extensions (Intel APX) Architecture Specification, revision 7.0 (July 2025): Section 4.2.19, Table 4.20; Section 3.1.3.3.
  2. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): AAD, opcode table and Description.
  3. Intel XED v2026.08.23 (commit 0bcb6237345c): the exception class of each instruction form.

The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.