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AVX

avx-type-1 exception class

VEX-encoded moves whose memory operand must be aligned to its full size, such as VMOVAPS and VMOVNTDQ, which Intel's manual calls Exceptions Type 1.

Class
avx-type-1 in Intel XED
Applies to
VEX encodings, 128 and 256 bits.
Instructions
7 mnemonics, 32 forms
Data
Intel XED v2026.08.23

Exception conditions

When an instruction of the class raises each exception, and in which processor modes. Protected mode includes compatibility mode. How to read the table.
ExceptionRealVirtual-8086Protected64-bitCondition
#UDAlways: real and virtual-8086 mode have no VEX prefix.
#UDThe operating system has not enabled the AVX state: CR4.OSXSAVE is 0, or XCR0 bits 1 and 2 (SSE and AVX state) are not both 1.
#UDThe instruction has a LOCK prefix (F0).
#UDA REX, F2, F3 or 66 prefix comes before the VEX prefix.
#UDThe processor lacks the instruction’s extension: its CPUID feature flag is 0.
#NMCR0.TS (task switched, bit 3) is 1.
#SS(0)A memory operand addressed through SS lies outside the stack segment.
#SS(0)A memory operand addressed through SS has a non-canonical address.
#GP(0)The memory operand is not aligned to its size: 32 bytes for VEX.256, 16 bytes for VEX.128.
#GP(0)A memory operand in the CS, DS, ES, FS or GS segment has an effective address that the segment does not allow, such as one beyond its limit.
#GP(0)A memory operand has a non-canonical address.
#GP(0)A memory operand extends past offset FFFFh of its segment.
#PF(fault-code)Accessing a memory operand causes a page fault.

Notes

Alignment follows the vector length: a 256-bit memory operand must be 32-byte aligned and a 128-bit one 16-byte aligned, or the instruction raises #GP(0). Other VEX instructions accept any alignment. The class has no #AC and no SIMD floating-point exceptions.

The 256-bit form of VMOVNTDQA needs AVX2 (Table 2-17).

  • SSE_TYPE_1: Legacy SSE moves that need a 16-byte aligned memory operand, such as MOVAPS and MOVNTDQ, which Intel's manual calls Exceptions Type 1.
  • avx-type-4M: The VEX-encoded unaligned moves VMOVUPS, VMOVUPD and VMOVDQU, which Intel's manual refers to Exceptions Type 4 with one more reason for #UD.
  • AVX512-E1: The EVEX-encoded aligned moves VMOVAPS, VMOVAPD, VMOVDQA32 and VMOVDQA64, whose memory operand must be aligned to its full size, which Intel's manual calls Exceptions Type E1.

Instructions

Intel XED puts forms of 7 mnemonics in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.

AVX

AVX2

Sources

  1. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.5.1, Table 2-18; Section 2.5, Tables 2-14, 2-15 and 2-17.
  2. Intel XED v2026.08.23 (commit 0bcb6237345c): the exception class of each instruction form.

The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.