Class
avx-type-14 in Intel XED
Applies to
The VEX encodings of CMPccXADD, which exist only in 64-bit mode.
Instructions
1 mnemonic, 2 forms
Data
Intel XED v2026.08.23

Exception conditions

When an instruction of the class raises each exception, and in which processor modes. Protected mode includes compatibility mode. How to read the table.
ExceptionRealVirtual-8086Protected64-bitCondition
#UDyesyesyesnoAlways: the instruction exists only in 64-bit mode.
#UDnononoyesA LOCK, REX, F2, F3 or 66 prefix comes before the VEX prefix.
#UDnononoyesThe processor lacks the instruction’s extension: its CPUID feature flag is 0.
#UDnononoyesThe ModR/M byte encodes a register instead of the memory operand (mod is 11b).
#SS(0)nononoyesA memory operand addressed through SS has a non-canonical address.
#GP(0)nononoyesA memory operand has a non-canonical address.
#PF(fault-code)nononoyesAccessing a memory operand causes a page fault.
#AC(0)noyesyesyesCode at privilege level 3 accesses a misaligned memory operand while alignment checking is on.

Notes

The memory operand is always locked, so an explicit LOCK prefix is not allowed. The #UD for a register operand comes from the instruction’s page. The manual’s table marks #AC(0) for virtual-8086 and protected mode as well, where the instruction itself raises #UD.

Instructions

Intel XED puts forms of 1 mnemonic in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.

CMPccXADD

Sources

  1. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.6.2, Tables 2-30 and 2-31; Chapter 3, CMPccXADD.
  2. Intel XED v2026.08.23 (commit 0bcb6237345c): the exception class of each instruction form.

The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.