AVX
avx-type-6 exception class
VEX-encoded instructions without a legacy SSE form, such as VBROADCASTSS, VINSERTF128, VPERM2I128 and VMASKMOVPS, which Intel's manual calls Exceptions Type 6.
- Class
avx-type-6in Intel XED- Applies to
- VEX encodings only, including those of SHA512 and SM4.
- Instructions
- 25 mnemonics, 79 forms
- Data
- Intel XED v2026.08.23
Exception conditions
| Exception | Real | Virtual-8086 | Protected | 64-bit | Condition |
|---|---|---|---|---|---|
#UD | yes | yes | no | no | Always: real and virtual-8086 mode have no VEX prefix. |
#UD | no | no | yes | yes | The operating system has not enabled the AVX state: CR4.OSXSAVE is 0, or XCR0 bits 1 and 2 (SSE and AVX state) are not both 1. |
#UD | no | no | yes | yes | The instruction has a LOCK prefix (F0). |
#UD | no | no | yes | yes | A REX, F2, F3 or 66 prefix comes before the VEX prefix. |
#UD | no | no | yes | yes | The processor lacks the instruction’s extension: its CPUID feature flag is 0. |
#NM | no | no | yes | yes | CR0.TS (task switched, bit 3) is 1. |
#SS(0) | no | no | yes | no | A memory operand addressed through SS lies outside the stack segment. |
#SS(0) | no | no | no | yes | A memory operand addressed through SS has a non-canonical address. |
#GP(0) | no | no | yes | no | A memory operand in the CS, DS, ES, FS or GS segment has an effective address that the segment does not allow, such as one beyond its limit. |
#GP(0) | no | no | no | yes | A memory operand has a non-canonical address. |
#PF(fault-code) | no | no | yes | yes | Accessing a memory operand causes a page fault. |
#AC(0) | no | no | yes | yes | Code at privilege level 3 makes a misaligned 2-, 4- or 8-byte memory access while alignment checking is on. |
Notes
The manual adds reasons for #UD to single instructions of the class:
VEX.W= 1: VEXTRACTF128, VBROADCASTSS, VBROADCASTSD, VBROADCASTF128, VINSERTF128, VMASKMOVPS, VMASKMOVPD, VBROADCASTI128, VPBROADCASTB, VPBROADCASTW, VPBROADCASTD, VEXTRACTI128 and VINSERTI128 (Table 2-16), and VPERM2F128 and VPERM2I128 (their pages).VEX.L= 0: VEXTRACTF128, VPERM2F128, VBROADCASTSD, VBROADCASTF128 and VINSERTF128, which exist only as 256-bit forms (Table 2-17).
VMASKMOVPS and VMASKMOVPD never raise #AC, whatever their mask.
XED also puts VPERMILPD and VPERMILPS here. The manual’s pages refer
their VEX forms to Type 4 instead, which has no #AC, and add #UD for
VEX.W = 1.
Related classes
Instructions
Intel XED puts forms of 25 mnemonics in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.
AVX
- VBROADCASTF128
- VBROADCASTSD
- VBROADCASTSS
- VEXTRACTF128
- VINSERTF128
- VMASKMOVPD
- VMASKMOVPS
- VPERM2F128
- VPERMILPD
- VPERMILPS
AVX2
- VBROADCASTI128
- VBROADCASTSD
- VBROADCASTSS
- VEXTRACTI128
- VINSERTI128
- VPBROADCASTB
- VPBROADCASTD
- VPBROADCASTQ
- VPBROADCASTW
- VPERM2I128
- VPMASKMOVD
- VPMASKMOVQ
SHA512
SM4
Sources
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.5.6, Table 2-23; Section 2.5, Tables 2-14 to 2-17; Chapter 5, VMASKMOV, VPERM2F128, VPERM2I128, VPERMILPD and VPERMILPS.
- Intel XED v2026.08.23 (commit
0bcb6237345c): the exception class of each instruction form.
The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.