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AVX

avx-type-7 exception class

VEX-encoded instructions without a memory operand or floating-point exceptions, such as VMOVMSKPS, VPSRLDQ and the shifts by an immediate count, which Intel's manual calls Exceptions Type 7.

Class
avx-type-7 in Intel XED
Applies to
VEX encodings that use registers only, such as VPSRLW ymm, ymm, imm8.
Instructions
15 mnemonics, 44 forms
Data
Intel XED v2026.08.23

Exception conditions

When an instruction of the class raises each exception, and in which processor modes. Protected mode includes compatibility mode. How to read the table.
ExceptionRealVirtual-8086Protected64-bitCondition
#UDAlways: real and virtual-8086 mode have no VEX prefix.
#UDThe operating system has not enabled the AVX state: CR4.OSXSAVE is 0, or XCR0 bits 1 and 2 (SSE and AVX state) are not both 1.
#UDThe instruction has a LOCK prefix (F0).
#UDA REX, F2, F3 or 66 prefix comes before the VEX prefix.
#UDThe processor lacks the instruction’s extension: its CPUID feature flag is 0.
#NMCR0.TS (task switched, bit 3) is 1.

Notes

Without a memory operand, only #UD and #NM remain.

VMOVLHPS and VMOVHLPS exist only as 128-bit forms and raise #UD for VEX.L = 1; the 256-bit forms of the integer instructions need AVX2 (Table 2-17). The forms of the shifts that take their count from a register or from memory are avx-type-4.

  • SSE_TYPE_7: Legacy SSE instructions without a memory operand or floating-point exceptions, such as MOVMSKPS, PSLLDQ and the shifts by an immediate count, which Intel's manual calls Exceptions Type 7.
  • avx-type-4: VEX-encoded integer, logical, shuffle and cryptographic instructions without floating-point exceptions, such as VPADDD, VPSHUFB and VAESENC, which Intel's manual calls Exceptions Type 4.
  • AVX512-E7NM128: The EVEX-encoded VMOVHLPS and VMOVLHPS, register moves that exist only as 128-bit forms, which Intel's manual calls Exceptions Type E7NM.128.

Instructions

Intel XED puts forms of 15 mnemonics in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.

AVX

AVX2

Sources

  1. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.5.7, Table 2-24; Section 2.5, Tables 2-14, 2-15 and 2-17.
  2. Intel XED v2026.08.23 (commit 0bcb6237345c): the exception class of each instruction form.

The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.