AVX-512
AVX512-K21 exception class
The VEX-encoded opmask moves KMOVB, KMOVW, KMOVD and KMOVQ in the forms that can address memory, which Intel's manual calls Exceptions Type K21.
- Class
AVX512-K21in Intel XED- Applies to
- VEX encodings of KMOVB, KMOVW, KMOVD and KMOVQ.
- Instructions
- 4 mnemonics, 13 forms
- Data
- Intel XED v2026.08.23
Exception conditions
| Exception | Real | Virtual-8086 | Protected | 64-bit | Condition |
|---|---|---|---|---|---|
#UD | yes | yes | yes | yes | The processor lacks the instruction’s extension: its CPUID feature flag is 0. |
#UD | yes | yes | no | no | Always: real and virtual-8086 mode have no VEX prefix. |
#UD | no | no | yes | yes | The operating system has not enabled the opmask state: CR4.OSXSAVE is 0, or XCR0 lacks one of the bits that Table 2-39 requires. |
#UD | no | no | yes | yes | A VEX field has a value that the manual’s general rules forbid (Tables 2-40 and 2-41). |
#UD | no | no | yes | yes | A REX, F2, F3 or 66 prefix comes before the VEX prefix. |
#NM | yes | yes | yes | yes | CR0.TS (task switched, bit 3) is 1. |
#SS(0) | yes | yes | yes | no | A memory operand addressed through SS lies outside the stack segment. |
#SS(0) | no | no | no | yes | A memory operand addressed through SS has a non-canonical address. |
#GP(0) | no | no | yes | no | A memory operand in the CS, DS, ES, FS or GS segment has an effective address that the segment does not allow, such as one beyond its limit. |
#GP(0) | no | no | yes | no | A memory operand uses DS, ES, FS or GS while that register holds a null selector. |
#GP(0) | no | no | no | yes | A memory operand has a non-canonical address. |
#GP(0) | yes | yes | no | no | A memory operand extends past offset FFFFh of its segment. |
#PF(fault-code) | no | yes | yes | yes | Accessing a memory operand causes a page fault. |
#AC(0) | no | yes | yes | yes | Code at privilege level 3 makes a misaligned 2-, 4- or 8-byte memory access while alignment checking is on. |
Notes
XED also puts here the forms that load a mask register from a
general-purpose register, such as KMOVW k, r32, which the page of
KMOV refers, as register-only encodings, to Type K20
(AVX512-K20).
Related classes
Instructions
Intel XED puts forms of 4 mnemonics in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.
AVX10.1
Sources
- Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.9.2, Table 2-66; Section 2.7.11, Tables 2-39 to 2-41; Chapter 3, KMOVW/KMOVB/KMOVQ/KMOVD.
- Intel XED v2026.08.23 (commit
0bcb6237345c): the exception class of each instruction form.
The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.