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SSE

SSE_TYPE_7 exception class

Legacy SSE instructions without a memory operand or floating-point exceptions, such as MOVMSKPS, PSLLDQ and the shifts by an immediate count, which Intel's manual calls Exceptions Type 7.

Class
SSE_TYPE_7 in Intel XED
Applies to
Legacy SSE encodings that use registers only, such as PSRLW xmm, imm8.
Instructions
15 mnemonics, 23 forms
Data
Intel XED v2026.08.23

Exception conditions

When an instruction of the class raises each exception, and in which processor modes. Protected mode includes compatibility mode. How to read the table.
ExceptionRealVirtual-8086Protected64-bitCondition
#UDThe operating system has not enabled SSE: CR0.EM is 1 or CR4.OSFXSR is 0.
#UDThe instruction has a LOCK prefix (F0).
#UDThe processor lacks the instruction’s extension: its CPUID feature flag is 0.
#NMCR0.TS (task switched, bit 3) is 1.

Notes

Without a memory operand, only #UD and #NM remain. The manual’s table marks #NM for protected and 64-bit mode only.

XED splits the shifts by operand: the forms with a count in a register or in memory are SSE_TYPE_4, the forms with an immediate count are here.

  • avx-type-7: VEX-encoded instructions without a memory operand or floating-point exceptions, such as VMOVMSKPS, VPSRLDQ and the shifts by an immediate count, which Intel's manual calls Exceptions Type 7.
  • SSE_TYPE_4: Legacy SSE instructions with a 16-byte memory operand and no floating-point exceptions, such as PADDD, PSHUFB, ANDPS and AESENC, which Intel's manual calls Exceptions Type 4.
  • mmx-nomem: PEXTRW and PMOVMSKB with MMX registers, which have no memory operand, as Intel's manual lists them among the SIMD/MMX instructions without a memory reference.

Instructions

Intel XED puts forms of 15 mnemonics in this class, listed here by extension. Where a mnemonic also has forms of other classes, its link leads to its first form of this one.

SSE

SSE2

Sources

  1. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026): Section 2.5.7, Table 2-24; Section 2.5, Tables 2-14 and 2-15.
  2. Intel XED v2026.08.23 (commit 0bcb6237345c): the exception class of each instruction form.

The list of instructions is derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted it. The text is our own.