F2XM1 instruction (x87)

F2XM1 replaces ST(0), a number x from -1 to +1, by 2^x - 1. Both parts of that shape are deliberate:

Minus one. For x near 0, 2^x is near 1, and a result of 2^x would spend its leading bits on that 1. F2XM1 returns the small difference at full precision instead, as C’s expm1 does for e^x.
A narrow range. A power of 2 with any exponent is put together from F2XM1 and its neighbours: FRNDINT splits x into an integer n and a fraction f, F2XM1 and an addition of 1 give 2^f, and FSCALE multiplies that by 2^n. For e^x, x is first multiplied by log2(e) from FLDL2E.

GCC 14 at -O2 with -ffast-math compiles exp2l(x) on a long double to exactly that, between stack moves: frndint, fsub, f2xm1, fld1, faddp, fscale; expl adds fldl2e and fmulp in front, and expm1l is built from the same parts. Without it, and with Clang 23 in either case, these are calls of the library.

Outside the range

Intel’s and AMD’s manuals leave the result undefined for |x| > 1. Zen 5 returned x itself with PE, with no other exception: for 1.5, -2.5, 10 and the largest 80-bit number alike, and even for the number just above 1. So a wrong argument gives no error, just a wrong value. The infinities are defined: -infinity gives -1 and +infinity itself, both exact.

Exact and tiny results

+0 and -0 are returned as they are, without PE. The ends of the range have exact results, 1 for x = 1 and -0.5 for x = -1, but Zen 5 raised PE for them all the same, as it does for FYL2X. For a denormal x the result, about x * ln(2), is a denormal too: DE, UE and PE. For other arguments the page’s pseudocode checks Zen 5’s results within 1 ulp (1.5 when not rounding to nearest), and the worst of its 20 recorded results was 0.41 ulp to nearest and 0.52 in the other modes.

AMD’s Zen 5 guide lists F2XM1 as microcoded, and Intel’s optimization manual suggests software implementations where 80 bits are not needed (Section 3.9.1).

Forms

Every encoding of F2XM1 that Intel XED knows, one row per XED instruction form (iform). How to read the notation.

Instruction	Encoding	Requires
`F2XM1` F2XM1	`D9 F0`	FPU

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

x = st0
if empty(st0):
    underflow()                  # IE, SF, C1 = 0
    st0 = INDEFINITE
elif is_finite(x) and less(1, abs(x)):
    pe = 1                       # |x| > 1: the manuals leave the
    c1 = 0                       # result undefined; Zen 5 keeps x
                                 # in ST(0), inexact
else:
    st0 = exp2m1(x)              # 2^x - 1, within 1 ulp (1.5 when
                                 # not rounding to nearest); Zen 5's
                                 # 20 recorded results: 0.41 at most
                                 # to nearest, 0.52 in the other
                                 # modes. -inf gives -1, +inf
                                 # itself, both exact
c0 = c2 = c3 = UNDEFINED         # Zen 5 keeps them

Run on AMD Zen 5 (EPYC 9645): 47 cases.

Operands

What each form reads and writes, as Intel XED records it: the operands of its syntax, in order, and the implicit ones that the syntax does not name. How to read.

Operand	Kind	Action
`F2XM1`
`ST(0)`	implicit	read, write
`x87 status word`	implicit	write

Flags

M modified, U undefined; blank: not affected. How to read.

C0	C1	C2	C3
All forms
U	M	U	U

Attributes

What else XED records about the forms. How to read.

All forms: may abort a TSX transaction

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.

ISA set	CPUID	Processors
`X87` x87	FPU `CPUID.01H:EDX[0]` FPU	Every x86-64 processor in XED’s model and Zen 3 to Zen 6

More x87 instructions

All 90 x87 instructions

Outside the range#

Exact and tiny results#