FISTTP

FISTTP is FISTP with C’s rounding built in: it converts ST(0) to a signed 16-, 32- or 64-bit integer by dropping the fraction, whatever the control word’s RC says, stores it and pops. Zen 5 stored -2 for -2.5 with RC set to nearest, and 2147483647 for 2147483647.5 with RC set to up. It came with SSE3, not with the x87, and needs that CPUID bit (leaf 1, ECX bit 0); there is no form that keeps ST(0).

Why it exists#

Before it, a C cast from long double to an integer had to switch RC to toward zero with FLDCW and back around a FISTP. With -msse3, or -march=x86-64-v2 and up, GCC 14 and Clang 23 at -O2 compile (long)x to fld and fisttp QWORD PTR, (int)x and (short)x to the 32- and 16-bit forms, with no control-word traffic. In 32-bit code, where SSE2 has no 64-bit conversion, (long long)d on a double goes through the x87 the same way: GCC loads d with FLD, Clang copies it through an XMM register first, and both store it with FISTTP.

The edges#

Truncation widens the range by almost one: a value fits when its integer part does. Zen 5 stored 80000000H for -2147483648.5 with only PE, and 7FFFH for 32767.5, while 2147483648.0 and -32769.0 gave the integer indefinite (the most negative value of the size) with IE, as did a QNaN. A value between -1 and +1 gives 0; for a denormal, Zen 5 raised PE, not DE.

With IE unmasked, an invalid value leaves memory and the stack alone. With PE unmasked, Zen 5 stored the truncated value and popped, and the #MF came at the next waiting instruction. C1 is cleared.

Cost#

AMD’s Zen 5 guide lists FISTTP, like FISTP, as two macro-ops; the FLDCW pair it replaces is microcoded. For float and double in 64-bit code, compilers use SSE’s CVTTSD2SI and CVTTSS2SI instead, which truncate the same way without the x87 stack.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

if empty(st0):
    underflow()
    v = INDEFINITE
else:
    v = st0
r = cvtt_int(v, dest.bits)           # toward zero, whatever RC says; a
                                     # NaN, an infinity, an unsupported
                                     # encoding or a number out of range
                                     # gives the integer indefinite,
                                     # with IE; a denormal raises PE,
                                     # not DE
dest.write(r)
pop()
c0 = c2 = c3 = UNDEFINED

Operands

Flags

Attributes

What else XED records about the forms. How to read.

All forms

may abort a TSX transaction

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More SSE3 instructions

• ADDSUBPD
• ADDSUBPS
• HADDPD
• HADDPS
• HSUBPD
• HSUBPS
• LDDQU
• MOVDDUP
• MOVSHDUP
• MOVSLDUP