x86-64.net

Instruction

FNENI

An 8087 instruction that unmasked the coprocessor's interrupt; later x87 units ignore it, and XED decodes it as a no-op.

Extensions
Mnemonics
FNENI, FENI
Forms
1 (1 Legacy)
Data
Intel XED v2026.08.23

Forms

Every encoding of FNENI that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
FNENI undocumented FENI8087_NOPDB E0FPU

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

pass                             # the 8087's "enable interrupts":
                                 # since the 387 it does nothing, not
                                 # even wait for a pending exception

Run on AMD Zen 5 (EPYC 9645): 3 cases.

Operands

None: XED lists no operands for this form.

Flags

None: XED records no flag that the forms test or change.

Attributes

What else XED records about the forms. How to read.

All forms
may abort a TSX transaction

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, whose AMD processors end with Zen 2, and the CPU data of this site for Zen 3 to Zen 6.
ISA setCPUIDProcessors
X87

FPU
CPUID.01H:EDX[0] FPU

Every x86-64 processor in XED’s model and Zen 3 to Zen 6

More x87 instructions

All 90 x87 instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, operands, flags, exception classes, attributes, ISA sets, CPUID bits and chip model.
  2. The CPU data of x86-64.net: Zen 3 to Zen 6, from GCC’s -march feature sets and AMD’s Processor Programming References, which the page of each processor cites.
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-093, September 2026)
  4. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 1 (253665-093, September 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.