x86-64.net

Instruction

HRESET

Resets the parts of the processor's prediction history that EAX selects and the operating system enabled in IA32_HRESET_ENABLE; allowed only in ring 0.

Extensions
Forms
1 (1 Legacy)
Data
Intel XED v2026.08.23

Forms

Every encoding of HRESET that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
HRESET imm8 HRESET_IMM8F3 0F 3A F0 C0 ibHRESET

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to HRESET, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

IntrinsicCompiles to
_hreset void _hreset(int __eax)

HRESET imm8 Legacy -mhreset

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
HRESET

HRESET
CPUID.(EAX=07H,ECX=1):EAX[22] HRESET

Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Clang's x86 intrinsic headers, LLVM 23.1.2 (commit 85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them.
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.