LWPVAL

features = cpuid_leaf(0x80000001, 0)[2]
if not features >> 15 & 1:
    fault(UD)                    # CPUID: no LWP
if not xcr0 >> 62 & 1:           # LWP's state not enabled by the
    fault(UD)                    # OS
a = lwp_cbaddr
if a and load(a, 32) >> 1 & 1:   # running, with LWPVAL's event on
    c = lwp_count[1] - 1
    if c >= 0:                   # counted; src2 is not read
        lwp_count[1] = c
    else:                        # below 0: a record of event 1
        opts = load(a, 32)
        t = ptsc() if opts >> 30 & 1 else 0
        r = 1 | (lwp_cfg >> 32 & 0xFF) << 8  # CoreId
        r |= (imm & 0xFFFF) << 16  # imm's low 16 bits, src2,
        r |= src2 << 32 | this_rip << 64  # the address,
        r |= src1 << 128 | t << 192  # src1, the time stamp
        size = load(a + 4, 32) & 0xFFFFFFF
        size -= size % 32
        h = lwp_head
        store(load(a + 8, 64) + h, 256, r)
        nh = (h + 32) % size
        if nh == load(a + 64, 32):  # full
            missed = load(a + 24, 64)
            store(a + 24, 64, missed + 1)
            if opts >> 29 & 1:   # continuous mode only
                lwp_head = nh
        else:
            lwp_head = nh
        e = cpuid_leaf(0x8000001C, 0)
        v = load(a + (e[1] >> 24), 32)  # EventInterval1, and its
        v &= 0x3FFFFFF           # low bits random as the LWPCB's
        k = load(a + 7, 8) >> 4  # Random (byte 7, bits 7:4) asks
        if k:
            v = v >> k << k | random(k)
        lwp_count[1] = v         # counting down again
# no register or flag changes, so that LWPVAL can go anywhere. XED
# lists src1 as written: the APM has LWPVAL only read it