PABSD

PABSD replaces each doubleword with its absolute value: 4 results in an XMM register. It is the SSSE3 form of VPABSD, whose page covers the most negative doubleword, which stays negative because it has no positive 32-bit counterpart, and the sign-mask sequence that stands in for it without SSSE3. Unlike VPABSD, PABSD also has a 64-bit MMX form: on Zen 5, the recorded pabsd mm3, qword ptr [mem] turned 7FFFFFFFh into itself and left 80000000h as 80000000h in MM3, the same edge VPABSD’s page describes.

What the legacy form adds#

The 128-bit form is destructive, with the second operand an XMM register or a 128-bit memory location that must be aligned to 16 bytes, and it leaves bits 255:128 of the register as they were, unlike the VEX form, which zeros them (see mixing SSE and AVX). SSSE3 is part of x86-64-v2. In our builds at -O2, the sign-mask sequence VPABSD’s page shows for the baseline compiles the same way whether the code is written for PABSD or its VEX form; only -march=x86-64-v2 or -mssse3 turns it into the single instruction.

AMD’s latency spreadsheet for Zen 5 gives PABSD, like VPABSD, one macro-op with a latency of two cycles on two of the four vector pipelines; the MMX form has no latency recorded, only a throughput of two.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(2):
    mm1.d[i] = abs(src2.sd[i])
# x87: TOP = 0, all tags valid, bits 79:64 of mm1's register all ones

for i in range(4):
    xmm1.d[i] = abs(src2.sd[i])
# bits 128 and up of the register are unchanged

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

PABSD mm, m64

mmx-mem

PABSD mm, mm

none in XED

PABSD xmm, xmm/m128

SSE_TYPE_4

Attributes

What else XED records about the forms. How to read.

PABSD mm, mm/m64

may abort a TSX transaction

PABSD xmm, m128

aligned memory operand

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to PABSD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More SSSE3 instructions

• PABSB
• PABSW
• PALIGNR
• PHADDD
• PHADDSW
• PHADDW
• PHSUBD
• PHSUBSW
• PHSUBW
• PMADDUBSW
• PMULHRSW
• PSHUFB
• PSIGNB
• PSIGND
• PSIGNW