ROUNDSD

ROUNDSD rounds the low double of its source to a whole number, still a double, and keeps bits 127:64 of the destination. Its immediate works as ROUNDPS describes: a direction in bits 1:0, MXCSR’s direction instead when bit 2 is set, and no precision exception when bit 3 is set. On Zen 5, rounding a tiny positive double up under 0Ah gave 1.0 and left both MXCSR and the upper double alone.

What C’s floor becomes#

With -msse4.1, GCC 14 and Clang 23 at -O2 compile floor(x) to roundsd xmm0, xmm0, 9, ceil to 0Ah and trunc to 0Bh, and (long)floor(x) to ROUNDSD followed by CVTTSD2SI. round(x), which rounds halves away from zero, is a library call in GCC; Clang adds 0.49999999999999994 with the sign of x and truncates. The intrinsics differ from the C functions in one bit: _mm_floor_sd(a, b) compiles to roundsd xmm0, xmm1, 1, since _MM_FROUND_FLOOR leaves the precision exception enabled, while floor uses 9.

The upper half#

The legacy form merges its result into the old destination, so the instruction depends on whatever last wrote that register even when the program only wants a scalar. Both compilers read floor(*p) with a MOVSD load, which zeroes the upper half, and round in place rather than use the memory form; for round(x) Clang zeroes the destination with XORPS before rounding into it from another register. AMD’s guide for Zen 5 names ROUNDSS and ROUNDSD among the instructions that skip the wait for the old destination when its upper bits are known to be zero (Section 2.11.5).

VROUNDSD, the VEX form, takes the upper double from a separate register and clears the bits above 127. With -mavx, GCC folds the load of floor(*p) into vroundsd xmm0, xmm0, qword ptr [rdi], 9, which takes the upper half from XMM0’s old contents; Clang still loads with MOVSD first. AVX-512 has no EVEX form; it rounds with VRNDSCALESD. ROUNDSS is the single-precision form and ROUNDPD the packed one, which Clang uses for a loop over floor and GCC, under its default -ftrapping-math, does not.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

xmm1.f64[0] = round(src2.f64[0], imm8)
# xmm1.q[1] keeps its value
# imm8[1:0]: rn, rd, ru, rz; bit 2: MXCSR.RC; bit 3: no PE
# bits 128 and up of the register are unchanged

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

SSE_TYPE_3

Attributes

What else XED records about the forms. How to read.

All forms

follows MXCSR

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to ROUNDSD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More SSE4.1 instructions

• MOVNTDQA
• MPSADBW
• PACKUSDW
• PBLENDVB
• PBLENDW
• PCMPEQQ
• PEXTRB
• PEXTRD
• PEXTRQ
• PEXTRW
• PHMINPOSUW
• PINSRB
• PINSRD
• PINSRQ
• PMAXSB
• PMAXSD
• PMAXUD
• PMAXUW
• PMINSB
• PMINSD
• PMINUD
• PMINUW
• PMOVSXBD
• PMOVSXBQ
• PMOVSXBW
• PMOVSXDQ
• PMOVSXWD
• PMOVSXWQ
• PMOVZXBD
• PMOVZXBQ
• PMOVZXBW
• PMOVZXDQ
• PMOVZXWD
• PMOVZXWQ
• PMULDQ
• PMULLD
• PTEST
• ROUNDPD
• ROUNDPS
• ROUNDSS

All 49 SSE4.1 instructions