TCMMIMFP16PS

TCMMIMFP16PS multiplies two tiles of complex numbers as matrices and adds the imaginary parts of the result to a tile of singles: C += Im(A × B). Each dword of A and B holds one complex number, real part in the low FP16 half and imaginary part in the high half, and element C[m][n] gains the sum over k of Ai × Br + Ar × Bi, taking A[m][k] and B[k][n]. TCMMRLFP16PS is the real-part twin, and its page covers what they share: B stored as a plain row-major matrix, without the interleaving of the real AMX multiplies, the shapes the tile configuration must give, and arithmetic that keeps two single-precision sums per element, rounds to nearest even, ignores MXCSR and flushes denormal results to zero.

Pairing the two#

A complex product C = A × B needs both instructions, with the same A and B and two accumulator tiles, so the result comes out split: one tile of real parts and one of imaginary parts, single precision, not interleaved as the inputs were. Each reads A and B in full: TCMMRLFP16PS forms the products Ar × Br and Ai × Bi, TCMMIMFP16PS the cross products Ai × Br and Ar × Bi, so together they make each of the four real products of a complex product once.

In our builds#

With -mamx-complex, GCC 14 and Clang 23 at -O2 compile _tile_cmmimfp16ps(0, 1, 2) to tcmmimfp16ps tmm0, tmm1, tmm2, the bytes C4 E2 69 6C C1: the same opcode 6Ch as TCMMRLFP16PS with the 66 prefix bits. Like every AMX instruction it runs only in 64-bit mode and aborts a TSX transaction. Zen 5 has no AMX, and this site’s recorded cases include none of TCMMIMFP16PS.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 3 != 3:                # TILECFG and TILEDATA
    fault(UD)
if palette != 1:                     # 0: no tiles configured; ACE's
    fault(UD)                        # palette 2 multiplies no tiles
t = tmm1.number                      # three different tiles
if t == tmm2.number or t == tmm3.number:
    fault(UD)
if tmm2.number == tmm3.number:
    fault(UD)
if 0 in (tmm1.rows, tmm2.rows, tmm3.rows):
    fault(UD)                        # one TILECFG leaves out
if tmm1.colsb % 4 or tmm2.colsb % 4:
    fault(UD)                        # rows of whole dwords
if tmm2.rows != tmm1.rows:           # A: M rows, as C
    fault(UD)
if tmm2.colsb // 4 != tmm3.rows:     # A: K dwords, B: K rows
    fault(UD)
if tmm3.colsb != tmm1.colsb:         # B: N dwords, as C
    fault(UD)
# K and N within the TMUL unit's 16 and 64 bytes (CPUID leaf
# 1EH): true of every tile of palette 1
if xfd >> 18 & 1:                    # the OS keeps the tiles from
    fault(NM)                        # this thread
for m in range(tmm1.rows):
    x = tmm2.row[m]                  # row m of A
    for n in range(tmm1.colsb // 4):
        e = o = cvt_f32_ne(0)        # two sums, from +0
        for k in range(tmm2.colsb // 4):
            y = tmm3.row[k]          # row k of B
            # im * re, and re * im
            a = x.f16[2 * k + 1]
            b = y.f16[2 * n]
            e = fmadd_ne(a, b, e)
            a = x.f16[2 * k]
            b = y.f16[2 * n + 1]
            o = fmadd_ne(a, b, o)
        c = tmm1.row[m].f32[n]
        r = add_ne(e, o)
        tmm1.row[m].f32[n] = add_ne(c, r)
start_row = 0
# tmm1 is zeroed past its rows and colsb

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AMX-E4

Attributes

What else XED records about the forms. How to read.

All forms

may abort a TSX transaction

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TCMMIMFP16PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AMX-COMPLEX instructions

• TCMMRLFP16PS