x86-64.net

Instruction

TCMMRLFP16PS

Multiplies two tiles of complex half-precision numbers and accumulates the real parts of the products into a single-precision tile.

Extensions
Forms
1 (1 VEX)
Data
Intel XED v2026.08.23

Forms

Every encoding of TCMMRLFP16PS that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
TCMMRLFP16PS tmm, tmm, tmm 64-bit mode only TCMMRLFP16PS_TMMf32_TMM2f16_TMM2f16VEX.LZ.NP.0F38.W0 6C /rAMX_COMPLEX (leaf 1EH) or AMX_COMPLEX

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TCMMRLFP16PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

IntrinsicCompiles to
_tile_cmmrlfp16ps void _tile_cmmrlfp16ps(const int dst, const int a, const int b)

TCMMRLFP16PS tmm, tmm, tmm VEX.LZ -mamx-complex

Clang's comment names TCMMIMFP16PS, which computes the imaginary parts; this intrinsic computes the real parts, and Clang emits TCMMRLFP16PS.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
AMX_COMPLEX

AMX_COMPLEX (leaf 1EH)
CPUID.(EAX=1EH,ECX=1):EAX[2] AMX_COMPLEX (leaf 1EH)

or

AMX_COMPLEX
CPUID.(EAX=07H,ECX=1):EDX[8] AMX_COMPLEX

Granite Rapids, Diamond Rapids

More AMX-COMPLEX instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Clang's x86 intrinsic headers, LLVM 23.1.2 (commit 85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them.
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.