TDPBF8PS

TDPBF8PS is the 8-bit floating-point matrix multiply of AMX-FP8: C += A × B, where every dword of A and B holds four E5M2 values and C holds singles. E5M2, which the mnemonic calls BF8, has a sign, 5 exponent bits with a bias of 15, and 2 fraction bits: its numbers run from 2^-16 (denormal, 01H) to 57344 (7BH), 7CH is +infinity and 7DH to 7FH are NaNs. The shapes follow TDPBSSD, whose four values per dword and #UD and #NM conditions it shares: A is M rows of K dwords, B is K rows of N dwords with four consecutive rows of its matrix packed into each dword, C is M rows of N singles. Palette 1 is required: ACE’s palette 2 raises #UD.

One rounding for the whole sum#

The ISE works an element of C out in fixed point: the products add up without any loss. Only the finished sum is rounded to a single, and then the old C is added to it with a second rounding. Both round to nearest even. So unlike TDPBF16PS, which keeps rounded partial sums, the order of the products cannot change the result. Take A with 1, 2^-16 in its first dword and 2^-16 in its second, and B with 1, 2^-8 in row 0 and 2^-8 in row 1: the sum is exactly 1 + 2^-23, the single 3F800001H, where rounding after each dword would give 1. With C = 1, 2 + 2^-23 is then a tie, and it rounds to 2.

Fixed treatment of special values#

Input denormals count at their value, and denormal results become zero. A non-zero sum is at least 2^-32, far above the denormals of a single, so only a denormal C with a zero sum can meet this. MXCSR is untouched and nothing is flagged. A NaN anywhere in the element’s inputs, C included, even multiplied by zero, gives the QNaN indefinite FFC00000H, as does infinity times zero or +infinity plus -infinity in the sum. A sum cannot overflow: the 64 products of a full tile, each at most 57344 squared, stay under 2^38.

In our builds#

GCC 14 has no -mamx-fp8 option. With it, Clang 23 at -O2 compiles _tile_dpbf8ps(0, 1, 2) to tdpbf8ps tmm0, tmm1, tmm2, the bytes C4 E5 68 FD C1, in VEX map 5; the 66, F3 and F2 prefix bits make it TDPHF8PS, TDPHBF8PS and TDPBHF8PS. Zen 5 has no AMX, and this site’s recorded cases include none of TDPBF8PS.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 3 != 3:                # TILECFG and TILEDATA
    fault(UD)
if palette != 1:                     # 0: no tiles configured; ACE's
    fault(UD)                        # palette 2 multiplies no tiles
t = tmm1.number                      # three different tiles
if t == tmm2.number or t == tmm3.number:
    fault(UD)
if tmm2.number == tmm3.number:
    fault(UD)
if 0 in (tmm1.rows, tmm2.rows, tmm3.rows):
    fault(UD)                        # one TILECFG leaves out
if tmm1.colsb % 4 or tmm2.colsb % 4:
    fault(UD)                        # rows of whole dwords
if tmm2.rows != tmm1.rows:           # A: M rows, as C
    fault(UD)
if tmm2.colsb // 4 != tmm3.rows:     # A: K dwords, B: K rows
    fault(UD)
if tmm3.colsb != tmm1.colsb:         # B: N dwords, as C
    fault(UD)
# K and N within the TMUL unit's 16 and 64 bytes (CPUID leaf
# 1EH): true of every tile of palette 1
if xfd >> 18 & 1:                    # the OS keeps the tiles from
    fault(NM)                        # this thread
for m in range(tmm1.rows):
    x = tmm2.row[m]                  # row m of A
    for n in range(tmm1.colsb // 4):
        s = 0                        # the exact sum
        for i in range(tmm2.colsb):  # byte i of A's row: byte
            y = tmm3.row[i // 4]     # i % 4 of dword i // 4
            b = y.bf8[4 * n + i % 4]
            p = mul_exact(x.bf8[i], b)
            s = add_exact(s, p)
        c = tmm1.row[m].f32[n]
        r = round_ftz(s, 0)          # rounded once
        t = add_exact(c, r)
        tmm1.row[m].f32[n] = round_ftz(t, 0)
start_row = 0
# tmm1 is zeroed past its rows and colsb

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AMX-E4

Attributes

What else XED records about the forms. How to read.

All forms

always rounds to nearest even; may abort a TSX transaction

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TDPBF8PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AMX-FP8 instructions

• TDPBHF8PS
• TDPHBF8PS
• TDPHF8PS