TDPBHF8PS

TDPBHF8PS is the mixed form of TDPBF8PS: C += A × B with the first source A in E5M2 and the second source B in E4M3, four values per dword, singles in C. The shapes, faults and arithmetic are that page’s, and TDPHF8PS describes E4M3. TDPHBF8PS swaps the formats. The B and H in the mnemonic name the formats in operand order, B for BF8 (E5M2) and H for HF8 (E4M3), so tdpbhf8ps tmm0, tmm1, tmm2 reads TMM1 as E5M2 and TMM2 as E4M3.

What the mix changes#

The two formats share no scale: E5M2 reaches 57344 and has steps down to 2^-16, E4M3 reaches 448 and has steps down to 2^-9. A product is therefore at most 25,690,112 and at least 2^-25 in size, and a sum of 64 of them stays under 2^31, far inside a single’s range. Like every FP8 dot product, it adds the products exactly and rounds only the finished sum, then rounds again when adding the old C.

Only A can hold an infinity here, as 7CH or FCH. Infinity times a non-zero E4M3 number gives infinity and times zero the QNaN indefinite (FFC00000H), which a sum where both infinities meet gives too. A NaN in A is 7DH to 7FH or FDH to FFH; in B only 7FH and FFH are NaNs, so FEH there is the number -448, not a NaN as it would be in A. Nothing in a tile marks its format, so a tile read in the wrong one gives other numbers and no fault.

In our builds#

GCC 14 has no -mamx-fp8 option. With it, Clang 23 at -O2 compiles _tile_dpbhf8ps(0, 1, 2) to tdpbhf8ps tmm0, tmm1, tmm2, the bytes C4 E5 6B FD C1: opcode FDh of VEX map 5 with the F2 prefix bits. Zen 5 has no AMX, and this site’s recorded cases include none of TDPBHF8PS.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 3 != 3:                # TILECFG and TILEDATA
    fault(UD)
if palette != 1:                     # 0: no tiles configured; ACE's
    fault(UD)                        # palette 2 multiplies no tiles
t = tmm1.number                      # three different tiles
if t == tmm2.number or t == tmm3.number:
    fault(UD)
if tmm2.number == tmm3.number:
    fault(UD)
if 0 in (tmm1.rows, tmm2.rows, tmm3.rows):
    fault(UD)                        # one TILECFG leaves out
if tmm1.colsb % 4 or tmm2.colsb % 4:
    fault(UD)                        # rows of whole dwords
if tmm2.rows != tmm1.rows:           # A: M rows, as C
    fault(UD)
if tmm2.colsb // 4 != tmm3.rows:     # A: K dwords, B: K rows
    fault(UD)
if tmm3.colsb != tmm1.colsb:         # B: N dwords, as C
    fault(UD)
# K and N within the TMUL unit's 16 and 64 bytes (CPUID leaf
# 1EH): true of every tile of palette 1
if xfd >> 18 & 1:                    # the OS keeps the tiles from
    fault(NM)                        # this thread
for m in range(tmm1.rows):
    x = tmm2.row[m]                  # row m of A
    for n in range(tmm1.colsb // 4):
        s = 0                        # the exact sum
        for i in range(tmm2.colsb):  # byte i of A's row: byte
            y = tmm3.row[i // 4]     # i % 4 of dword i // 4
            b = y.hf8[4 * n + i % 4]
            p = mul_exact(x.bf8[i], b)
            s = add_exact(s, p)
        c = tmm1.row[m].f32[n]
        r = round_ftz(s, 0)          # rounded once
        t = add_exact(c, r)
        tmm1.row[m].f32[n] = round_ftz(t, 0)
start_row = 0
# tmm1 is zeroed past its rows and colsb

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AMX-E4

Attributes

What else XED records about the forms. How to read.

All forms

always rounds to nearest even; may abort a TSX transaction

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TDPBHF8PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AMX-FP8 instructions

• TDPBF8PS
• TDPHBF8PS
• TDPHF8PS