x86-64.net

Instruction

TDPBSSD

Multiplies two tiles of signed bytes, four per dword, and accumulates each row-by-column dot product into a tile of 32-bit integers.

Extensions
Forms
1 (1 VEX)
Data
Intel XED v2026.08.23

Forms

Every encoding of TDPBSSD that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
TDPBSSD tmm, tmm, tmm 64-bit mode only TDPBSSD_TMMi32_TMM4i8_TMM4i8VEX.LZ.F2.0F38.W0 5E /rAMX_INT8 (leaf 1EH) or AMX_TILE + AMX_INT8

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TDPBSSD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

IntrinsicCompiles to
_tile_dpbssd void _tile_dpbssd(const int dst, const int src0, const int src1)

TDPBSSD tmm, tmm, tmm VEX.LZ -mamx-tile -mamx-int8

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
AMX_INT8

AMX_INT8 (leaf 1EH)
CPUID.(EAX=1EH,ECX=1):EAX[0] AMX_INT8 (leaf 1EH)

or

AMX_TILE + AMX_INT8
CPUID.(EAX=07H,ECX=0):EDX[24] AMX_TILE
CPUID.(EAX=07H,ECX=0):EDX[25] AMX_INT8

Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids

More AMX-INT8 instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. Clang's x86 intrinsic headers, LLVM 23.1.2 (commit 85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them.
  3. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.