TDPHF8PS

TDPHF8PS is TDPBF8PS with both sources in E4M3, which the mnemonic calls HF8: C += A × B, with four values in each dword of A and B and singles in C. That page covers the shapes, the faults and the arithmetic: one exact sum per element, rounded once, then added to the old C with a second rounding to nearest even, MXCSR untouched and nothing flagged.

A format with no infinity#

E4M3 has a sign, 4 exponent bits with a bias of 7 and 3 fraction bits. It gives up the infinities of ordinary floating-point formats to gain range: the top exponent still holds numbers, with fractions 0 to 6, and only S.1111.111, that is 7FH or FFH, is a NaN. The largest value is therefore 448 (7EH), and 1 is 38H; the smallest normal is 2^-6 (08H) and the smallest denormal 2^-9 (01H). Compared with E5M2, it trades range for one more fraction bit.

That removes some cases TDPBF8PS has to handle. No input is infinite, so neither is the sum, and infinity times zero cannot occur: the QNaN indefinite (FFC00000H) comes only from a NaN among the element’s inputs, C included, and an infinite C stays infinite unless a NaN appears. Every sum fits well inside the range of a single: 64 products of 448 squared stay under 2^24, in steps of 2^-18, so rounding can lose low bits but never overflow.

For an example, A holding 2^6, 2^-6 in its first dword and 2^-6 in its second, against B with 2^6, 2^-6 in row 0 and 2^-6 in row 1, gives exactly 2^12 + 2^-11, which a single holds. With C = 2^12 the second rounding meets a tie and gives 2^13 (46000000H). A zero sum added to a C of -0 gives +0.

In our builds#

GCC 14 has no -mamx-fp8 option. With it, Clang 23 at -O2 compiles _tile_dphf8ps(0, 1, 2) to tdphf8ps tmm0, tmm1, tmm2, the bytes C4 E5 69 FD C1: TDPBF8PS’s opcode FDh with the 66 prefix bits. Zen 5 has no AMX, and this site’s recorded cases include none of TDPHF8PS.

Forms

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

on = xcr0 if cr4 >> 18 & 1 else 0    # XCR0, where CR4.OSXSAVE is set
if on >> 17 & 3 != 3:                # TILECFG and TILEDATA
    fault(UD)
if palette != 1:                     # 0: no tiles configured; ACE's
    fault(UD)                        # palette 2 multiplies no tiles
t = tmm1.number                      # three different tiles
if t == tmm2.number or t == tmm3.number:
    fault(UD)
if tmm2.number == tmm3.number:
    fault(UD)
if 0 in (tmm1.rows, tmm2.rows, tmm3.rows):
    fault(UD)                        # one TILECFG leaves out
if tmm1.colsb % 4 or tmm2.colsb % 4:
    fault(UD)                        # rows of whole dwords
if tmm2.rows != tmm1.rows:           # A: M rows, as C
    fault(UD)
if tmm2.colsb // 4 != tmm3.rows:     # A: K dwords, B: K rows
    fault(UD)
if tmm3.colsb != tmm1.colsb:         # B: N dwords, as C
    fault(UD)
# K and N within the TMUL unit's 16 and 64 bytes (CPUID leaf
# 1EH): true of every tile of palette 1
if xfd >> 18 & 1:                    # the OS keeps the tiles from
    fault(NM)                        # this thread
for m in range(tmm1.rows):
    x = tmm2.row[m]                  # row m of A
    for n in range(tmm1.colsb // 4):
        s = 0                        # the exact sum
        for i in range(tmm2.colsb):  # byte i of A's row: byte
            y = tmm3.row[i // 4]     # i % 4 of dword i // 4
            b = y.hf8[4 * n + i % 4]
            p = mul_exact(x.hf8[i], b)
            s = add_exact(s, p)
        c = tmm1.row[m].f32[n]
        r = round_ftz(s, 0)          # rounded once
        t = add_exact(c, r)
        tmm1.row[m].f32[n] = round_ftz(t, 0)
start_row = 0
# tmm1 is zeroed past its rows and colsb

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AMX-E4

Attributes

What else XED records about the forms. How to read.

All forms

always rounds to nearest even; may abort a TSX transaction

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to TDPHF8PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AMX-FP8 instructions

• TDPBF8PS
• TDPBHF8PS
• TDPHBF8PS