x86-64.net

Instruction

TOP4BSSD

ACE outer product of two ZMM registers of signed bytes, four per dword, accumulated into a tile of 32-bit integers.

Extensions
Forms
1 (1 EVEX)
Data
Intel XED v2026.08.23

TOP4BSSD is the basic ACE outer product. Both sources are ZMM registers of 16 dwords, each dword holding four signed bytes. For every row i and column j of the destination tile, it adds the dot product of dword i of the first source and dword j of the second (four byte products) to the 32-bit integer at (i, j): a 16 × 16 update of the whole tile, 1024 multiplications.

A matrix multiplication loop therefore loads a vector holding a 16 × 4 slice of A and one holding a 4 × 16 slice of B for each step of four along the shared dimension, and after the last step moves the finished 16 × 16 block out with TILEMOVROW. The signed and unsigned variants are TOP4BSUD, TOP4BUSD and TOP4BUUD; the first letter after TOP4B gives the type of the first source.

Forms

Every encoding of TOP4BSSD that Intel XED knows, one row per XED instruction form (iform). How to read the notation.
InstructionEncodingRequires
TOP4BSSD tmm, zmm, zmm 64-bit mode only TOP4BSSD_TMMu32_ZMMi8_ZMMi8EVEX.512.F2.0F38.W0 5E /rACE v1

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

CPUID requirements and processors of the XED ISA sets above. Alternatives are separated by “or”; processors follow XED’s chip model, which covers AMD processors up to Zen 2.
ISA setCPUIDProcessors in XED
ACE_1

ACE v1
CPUID.(EAX=07H,ECX=1):ECX[11] ACE
CPUID.(EAX=1DH,ECX=2):EAX[7:0] ≥ 1 ACE version

None yet: XED lists these instructions only under its placeholder for future processors.

More ACE instructions

Sources

  1. Intel XED v2026.08.23 (commit 0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model.
  2. x86 Ecosystem Advisory Group: AI Compute Extensions (ACE) Specification, version 1.16.2 (July 2026)
  3. x86 Ecosystem Advisory Group: The AI Compute Extensions (ACE) for x86, whitepaper version 1.0 (April 2026)

The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The text is our own.