VANDNPD

VANDNPD inverts its first source and ANDs the result with the second: the VEX and EVEX form of ANDNPD, whose page covers the operation, while VANDNPS explains the operand order. The newer encodings write a separate destination, read memory at any alignment and zero the register above the vector length. The VEX forms need AVX, ymm included; the EVEX forms need AVX512DQ (with AVX512VL below 512 bits) or AVX10.1, and add a write mask per double and a second source of one broadcast double. Only the second source can be memory, so the inverted operand is always a register.

Recorded on Zen 5#

With MXCSR at 1F80H, no case set a flag:

• vandnpd xmm12, xmm6, xmmword ptr [mem], with 7FFFFFFFFFFFFFFFh and -0.0 in XMM6 and the smallest denormal in both doubles of memory, gave 0 and that denormal, and zeroed bits 511:128 of ZMM12.
• vandnpd zmm1{k3}, zmm2, qword bcst [mem], with the same denormal broadcast, wrote it where k3 selected an element and ZMM2 held -0.0 (elements 5 and 7), 0 in the other selected ones, and kept elements 2 and 4 of ZMM1.

In compiled code#

In our builds at -O2 over global double arrays with -march=x86-64-v3, GCC 14 compiles a[i] = b[i] < c[i] ? 0.0 : d[i] to VCMPLTPD and vandnpd ymm0, ymm0, ymmword ptr [...], the compare result being the inverted operand; Clang 23 inverts the compare to VCMPNLTPD and uses VANDPD. With -march=x86-64-v4 the compare writes a mask register and a masked move selects. For -fabs(b[i]), GCC clears the sign bits with VANDNPD of -0.0 and sets them again with VORPD; for copysign its VANDNPD of -0.0 keeps the magnitude, as VANDPD’s page shows. At -v4 each becomes one VPTERNLOGQ.

Clang spells _mm512_andnot_pd as VANDNPS but keeps VANDNPD where the elements matter: with a mask, and with a broadcast, as in vandnpd zmm0, zmm0, qword bcst [rdi] for _mm512_andnot_pd(x, _mm512_set1_pd(*p)), where GCC loads the double with VBROADCASTSD first.

AMD’s latency spreadsheet for Zen 5 gives the VEX and the EVEX rows alike one macro-op with a latency of 1 cycle on pipes FP0 to FP3, four per cycle.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:  # 1 without a write mask
        zmm1.q[i] = ~zmm2.q[i] & src3.q[i]
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# m64bcst: src3.q[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-4

EVEX forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VANDNPD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX instructions

• VADDPD
• VADDPS
• VADDSD
• VADDSS
• VADDSUBPD
• VADDSUBPS
• VANDNPS
• VANDPD
• VANDPS
• VBLENDPD
• VBLENDPS
• VBLENDVPD
• VBLENDVPS
• VBROADCASTF128
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPS
• VCMPSD
• VCMPSS
• VCOMISD
• VCOMISS
• VCVTDQ2PD
• VCVTDQ2PS
• VCVTPD2DQ
• VCVTPD2PS
• VCVTPS2DQ
• VCVTPS2PD
• VCVTSD2SI
• VCVTSD2SS
• VCVTSI2SD
• VCVTSI2SS
• VCVTSS2SD
• VCVTSS2SI
• VCVTTPD2DQ
• VCVTTPS2DQ
• VCVTTSD2SI
• VCVTTSS2SI
• VDIVPD
• VDIVPS

All 253 AVX instructions

More AVX10.1 instructions

• KXNORB
• KXNORD
• KXNORQ
• KXNORW
• KXORB
• KXORD
• KXORQ
• KXORW
• VADDPD
• VADDPH
• VADDPS
• VADDSD
• VADDSH
• VADDSS
• VAESDEC
• VAESDECLAST
• VAESENC
• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPS
• VANDPD
• VANDPS
• VBLENDMPD
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X2
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X2
• VBROADCASTI64X4
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPH
• VCMPPS

All 686 AVX10.1 instructions