VANDPS

VANDPS computes the bitwise AND of two vectors of singles. It looks at them only as 32-bit patterns: nothing is rounded, MXCSR plays no part, no exception is possible and NaNs pass through as bits. What makes it a floating-point instruction is its use, with constants and compare results as masks, alongside VANDNPS (which inverts its first source), VORPS and VXORPS, the VEX forms of the legacy ANDPS family.

Masks for floats#

• Absolute value. Clearing bit 31 of each element is fabsf. For a[i] = fabsf(b[i]), GCC 14 and Clang 23 at -O2 with -march=x86-64-v3 broadcast 7FFFFFFFh with VBROADCASTSS and apply it with one VANDPS per vector, taking the data straight from memory.
• Copying a sign. copysignf(b[i], c[i]) takes bit 31 from c and the rest from b: VANDNPS, VANDPS and VORPS for -march=x86-64-v3 in both compilers, and a single VPTERNLOGD for -march=x86-64-v4.
• Selecting. A compare such as VCMPPS gives all ones or all zeros per element, so VANDPS with it zeroes the elements that failed. Code that computes a square root from VRSQRTPS’s estimate uses this to make 0 give 0 (see VSQRTPS).

EVEX needs AVX512DQ#

The EVEX forms, with masking, broadcast and registers 16 to 31, came with AVX512DQ, not AVX512F; AVX512F alone has only the integer VPANDD and VPANDQ. With -march=x86-64-v4, which includes DQ, GCC uses VANDPS on zmm registers for fabsf; with only -mavx512f -mavx512vl and 512-bit vectors preferred, both compilers use VPANDD instead. The result is the same bits either way.

AMD’s Zen 5 guide lists VANDPS and VPAND alike, one cycle on all four vector pipes, and still recommends keeping to the data type of the values, using VANDPS and VMAXPS on the results of VMULPS (Section 2.11.2).

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:  # 1 without a write mask
        zmm1.d[i] = zmm2.d[i] & src3.d[i]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# m32bcst: src3.d[i] is the m32 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-4

EVEX forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VANDPS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX instructions

• VADDPD
• VADDPS
• VADDSD
• VADDSS
• VADDSUBPD
• VADDSUBPS
• VANDNPD
• VANDNPS
• VANDPD
• VBLENDPD
• VBLENDPS
• VBLENDVPD
• VBLENDVPS
• VBROADCASTF128
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPS
• VCMPSD
• VCMPSS
• VCOMISD
• VCOMISS
• VCVTDQ2PD
• VCVTDQ2PS
• VCVTPD2DQ
• VCVTPD2PS
• VCVTPS2DQ
• VCVTPS2PD
• VCVTSD2SI
• VCVTSD2SS
• VCVTSI2SD
• VCVTSI2SS
• VCVTSS2SD
• VCVTSS2SI
• VCVTTPD2DQ
• VCVTTPS2DQ
• VCVTTSD2SI
• VCVTTSS2SI
• VDIVPD
• VDIVPS

All 253 AVX instructions

More AVX10.1 instructions

• KXNORW
• KXORB
• KXORD
• KXORQ
• KXORW
• VADDPD
• VADDPH
• VADDPS
• VADDSD
• VADDSH
• VADDSS
• VAESDEC
• VAESDECLAST
• VAESENC
• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPD
• VANDNPS
• VANDPD
• VBLENDMPD
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X2
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X2
• VBROADCASTI64X4
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPH
• VCMPPS
• VCMPSD
• VCMPSH
• VCMPSS

All 686 AVX10.1 instructions