VBLENDMPD

VBLENDMPD builds each double of its destination from one of two sources, chosen by a mask register: the second source where the mask bit is set, the first where it is clear, or zero there with {z}. It is VBLENDMPS on 64-bit elements, and the same selection as VPBLENDMQ; like both it copies bits, raises no floating-point exception and reads at most the low 8 bits of the mask. Compiled code uses it as it uses VBLENDMPS: GCC 14 and Clang 23 at -O2 with -march=x86-64-v4 blend a select with a constant fallback, o[i] = a[i] > b[i] ? c[i] : 5.0 over double arrays, with VCMPPD and VBLENDMPD, where -march=x86-64-v3 gives VBLENDVPD.

Recorded on Zen 5#

vblendmpd ymm17{k4}{z}, ymm30, ymm2 read only bits 3:0 of K4, 5h: it took elements 0 and 2 from YMM2 and wrote zero to elements 1 and 3 and to bits 256 and up. Without a mask, {evex} vblendmpd xmm14, xmm8, xmm29 copied XMM29. MXCSR stayed at 1F80h in all 6 cases.

Patching special lanes#

Intel’s optimization manual uses it in a division with 52 good bits (Section 17.25.4, Example 17-41). VRCP14PD estimates the reciprocal of each divisor and FMAs refine it, but for a divisor of zero or infinity the estimate is already exact, infinity or zero, and the refinement would spoil it. VFPCLASSPD marks those lanes, VBLENDMPD restores the estimate there, and the last FMA runs under the inverted mask.

AMD’s Zen 5 latency spreadsheet gives VBLENDMPD one cycle and four per cycle on any of the four vector pipes, as VPBLENDMQ.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.q[i] = src3.q[i]
    elif zeroing:
        zmm1.q[i] = 0
    else:
        zmm1.q[i] = zmm2.q[i]
# m64bcst: src3.f64[i] is the m64 for every i
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

opmask selects the source

Memory forms

embedded broadcast (tuple Full); memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• KXORB
• KXORD
• KXORQ
• KXORW
• VADDPD
• VADDPH
• VADDPS
• VADDSD
• VADDSH
• VADDSS
• VAESDEC
• VAESDECLAST
• VAESENC
• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPD
• VANDNPS
• VANDPD
• VANDPS
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X2
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X2
• VBROADCASTI64X4
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPH
• VCMPPS
• VCMPSD
• VCMPSH
• VCMPSS
• VCOMISD

All 686 AVX10.1 instructions