VBROADCASTI32X2

VBROADCASTI32X2 takes two doublewords, the low 64 bits of an XMM register or of memory, and repeats the pair in every 64-bit slot of an XMM, YMM or ZMM register, under a mask of doublewords. It is the integer form of VBROADCASTF32X2, which has no XMM destination. Unmasked, the result is what VPBROADCASTQ gives from the same 64 bits; the mask, which can split a pair, is the difference. It belongs to AVX512DQ, plus AVX512VL below 512 bits.

Recorded on Zen 5#

• XMM. {evex} vbroadcasti32x2 xmm9, xmm9 repeated the low pair once and cleared the register from bit 128 up.
• A split pair. vbroadcasti32x2 xmm14{k4}{z}, qword ptr [mem], with 5h in the low four bits of K4, wrote the first doubleword of memory in elements 0 and 2 and zeroed elements 1 and 3, the slots of the second.
• Zeroing, YMM. vbroadcasti32x2 ymm0{k3}{z}, xmm31, with EBh in K3, wrote elements 0, 1, 3, 5, 6 and 7, odd ones from the second doubleword of XMM31, and zeroed elements 2 and 4.
• Merging. vbroadcasti32x2 zmm7{k7}, qword ptr [mem] kept the old values of the elements whose bits in K7 are clear.

In compiled code#

At -O2 with -march=x86-64-v4, GCC 14 compiles _mm512_broadcast_i32x2 and _mm_broadcast_i32x2 to VBROADCASTI32X2, loading a value in memory first with VMOVQ. Clang 23 emits VBROADCASTSD for the 512-bit form, from memory or a register, and VMOVDDUP for the 128-bit one, the same bits. With a write mask, _mm512_mask_broadcast_i32x2, both use VBROADCASTI32X2.

AMD’s Zen 5 latency spreadsheet gives one macro-op on pipe FP1 or FP2, two per cycle, with 2 cycles for an XMM destination and 1 for YMM and ZMM.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.d[i] = src2.d[i % 2]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E6

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VBROADCASTI32X2, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VADDSD
• VADDSH
• VADDSS
• VAESDEC
• VAESDECLAST
• VAESENC
• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPD
• VANDNPS
• VANDPD
• VANDPS
• VBLENDMPD
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X2
• VBROADCASTI64X4
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPH
• VCMPPS
• VCMPSD
• VCMPSH
• VCMPSS
• VCOMISD
• VCOMISH
• VCOMISS
• VCOMPRESSPD
• VCOMPRESSPS
• VCVTDQ2PD
• VCVTDQ2PH
• VCVTDQ2PS

All 686 AVX10.1 instructions