VBROADCASTI64X2

VBROADCASTI64X2 loads 16 bytes from memory and repeats them in every 128-bit block of a YMM or ZMM register, under a mask of quadwords. It comes with AVX512DQ. VBROADCASTI32X4, from AVX512F, loads the same bytes into the same places and differs only in the mask, of doublewords; unmasked the two give the same result, and VBROADCASTI128 is the AVX2 form for YMM registers. All three take only a memory source.

On Zen 5, vbroadcasti64x2 zmm0{k5}, xmmword ptr [mem] with E1h in the low byte of K5 wrote quadword 0 of the memory to elements 0 and 6 and its quadword 1 to elements 5 and 7, each in its place within its block; elements 1 to 4 of ZMM0 kept their values. The unmasked {evex} vbroadcasti64x2 ymm0, xmmword ptr [mem] repeated the 16 bytes twice and cleared the bits from 256 up.

Which name the compilers pick#

GCC 14 at -O2 with -march=x86-64-v4 follows the intrinsic, and more: it compiles _mm512_broadcast_i64x2 and its masked forms to VBROADCASTI64X2, and also the 256-bit _mm256_broadcast_i64x2 and the AVX2 intrinsic _mm256_broadcastsi128_si256. For those two it gives the EVEX vbroadcasti64x2 ymm0, [rdi], six bytes, where the VEX VBROADCASTI128 of the same operands takes five. Clang 23 keeps VBROADCASTI64X2 for the masked intrinsics only: the plain 512-bit one becomes VBROADCASTI32X4, which needs only AVX512F, and the 256-bit ones VBROADCASTI128. Given a value in a register, which the instruction cannot take, both compilers emit VSHUFI64X2 with immediate 0.

Repeating constants do not make either compiler reach for it. For a[i] += 5; a[i+1] += 7; over a long long array, GCC loads a 64-byte constant holding the pair four times, while Clang loads the 16-byte pair with VBROADCASTI128 and works on YMM registers.

AMD’s Zen 5 latency spreadsheet gives VBROADCASTI64X2 what it gives VBROADCASTI32X4: one cycle on pipe FP1 or FP2 and two per cycle. Zen 5’s 2 recorded cases cover both widths.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.q[i] = mem.q[i % 2]
    elif zeroing:
        zmm1.q[i] = 0
    # else: zmm1.q[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E6

Attributes

What else XED records about the forms. How to read.

All forms

write masking; memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VBROADCASTI64X2, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VAESDEC
• VAESDECLAST
• VAESENC
• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPD
• VANDNPS
• VANDPD
• VANDPS
• VBLENDMPD
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X2
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X4
• VBROADCASTSD
• VBROADCASTSS
• VCMPPD
• VCMPPH
• VCMPPS
• VCMPSD
• VCMPSH
• VCMPSS
• VCOMISD
• VCOMISH
• VCOMISS
• VCOMPRESSPD
• VCOMPRESSPS
• VCVTDQ2PD
• VCVTDQ2PH
• VCVTDQ2PS
• VCVTNE2PS2BF16
• VCVTNEPS2BF16
• VCVTPD2DQ

All 686 AVX10.1 instructions