VBROADCASTSS

VBROADCASTSS copies one single to every element of a vector. Which sources it takes depends on the extension:

• AVX: memory only, a 4-byte value at any alignment, into an XMM or YMM register. Only those four bytes are read.
• AVX2: also the low element of an XMM register.
• AVX-512F (EVEX): ZMM destinations and masking, so that only the elements a mask selects receive the value.

The register form#

_mm256_set1_ps(x), with x in a register, shows what the AVX2 form added. Compiling for AVX alone, GCC 14 and Clang 23 at -O2 need two instructions, VSHUFPS to fill the low 128 bits and VINSERTF128 to copy them to the high half; with -mavx2 both emit vbroadcastss ymm0, xmm0. The same holds for a loop that multiplies an array by a scalar, which broadcasts the scalar once before the loop. A value in memory needs no AVX2: both compile _mm256_set1_ps(*p) to vbroadcastss ymm0, dword ptr [rdi].

The two sources may differ in cost. Intel’s optimization guide says that in the Crestmont microarchitecture the 256-bit memory form takes one ALU micro-op besides the load, and the register form two (Section 4.1.9.2).

Constants#

A constant repeated in every element can come from a 4-byte literal. GCC 14 loads a vector of eight 1.5s with VBROADCASTSS from such a literal even for AVX; Clang 23 does so with AVX2 but, with AVX alone, loads a 32-byte constant. With AVX-512 the broadcast can move into the instruction that uses the value: for x86-64-v4, Clang 23 compiles -x on a __m256 to one VXORPS whose memory operand, marked {1to8}, repeats a 4-byte sign mask, while GCC 14 loads the mask with VBROADCASTSS first (see VPBROADCASTD for the integer side).

VBROADCASTSD does the same for doubles, with YMM and ZMM destinations only, and VBROADCASTF128 repeats 16 bytes; VBROADCASTF32X2 and its kin repeat larger groups of singles.

In the optimization guide

What the optimization guide says about VBROADCASTSS, a line per claim. Each links to the claim in the guide, with its sources and where they differ.

Crestmont and Gracemont

• Vectors and AVX2: A 256-bit broadcast is cheapest from memory: one operation, a cycle on top of the load.

Skylake to Cooper Lake

• AVX-512 and frequency on the servers: A broadcast of a 32-bit or 64-bit element from memory runs on the load ports, sparing port 5; a 16-bit one still goes through port 5, so it gains nothing from the memory form.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:  # 1 without a write mask
        zmm1.d[i] = src2.d[0]
    elif zeroing:
        zmm1.d[i] = 0
    # else: zmm1.d[i] keeps its value
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-6

EVEX forms

AVX512-E6

Attributes

What else XED records about the forms. How to read.

EVEX forms

write masking

EVEX memory forms

memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VBROADCASTSS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX instructions

• VADDPD
• VADDPS
• VADDSD
• VADDSS
• VADDSUBPD
• VADDSUBPS
• VANDNPD
• VANDNPS
• VANDPD
• VANDPS
• VBLENDPD
• VBLENDPS
• VBLENDVPD
• VBLENDVPS
• VBROADCASTF128
• VBROADCASTSD
• VCMPPD
• VCMPPS
• VCMPSD
• VCMPSS
• VCOMISD
• VCOMISS
• VCVTDQ2PD
• VCVTDQ2PS
• VCVTPD2DQ
• VCVTPD2PS
• VCVTPS2DQ
• VCVTPS2PD
• VCVTSD2SI
• VCVTSD2SS
• VCVTSI2SD
• VCVTSI2SS
• VCVTSS2SD
• VCVTSS2SI
• VCVTTPD2DQ
• VCVTTPS2DQ
• VCVTTSD2SI
• VCVTTSS2SI
• VDIVPD
• VDIVPS

All 253 AVX instructions

More AVX2 instructions

• VBROADCASTI128
• VBROADCASTSD
• VEXTRACTI128
• VGATHERDPD
• VGATHERDPS
• VGATHERQPD
• VGATHERQPS
• VINSERTI128
• VMOVNTDQA
• VMPSADBW
• VPABSB
• VPABSD
• VPABSW
• VPACKSSDW
• VPACKSSWB
• VPACKUSDW
• VPACKUSWB
• VPADDB
• VPADDD
• VPADDQ
• VPADDSB
• VPADDSW
• VPADDUSB
• VPADDUSW
• VPADDW
• VPALIGNR
• VPAND
• VPANDN
• VPAVGB
• VPAVGW
• VPBLENDD
• VPBLENDVB
• VPBLENDW
• VPBROADCASTB
• VPBROADCASTD
• VPBROADCASTQ
• VPBROADCASTW
• VPCMPEQB
• VPCMPEQD
• VPCMPEQQ

All 138 AVX2 instructions

More AVX10.1 instructions

• VAESENCLAST
• VALIGND
• VALIGNQ
• VANDNPD
• VANDNPS
• VANDPD
• VANDPS
• VBLENDMPD
• VBLENDMPS
• VBROADCASTF32X2
• VBROADCASTF32X4
• VBROADCASTF32X8
• VBROADCASTF64X2
• VBROADCASTF64X4
• VBROADCASTI32X2
• VBROADCASTI32X4
• VBROADCASTI32X8
• VBROADCASTI64X2
• VBROADCASTI64X4
• VBROADCASTSD
• VCMPPD
• VCMPPH
• VCMPPS
• VCMPSD
• VCMPSH
• VCMPSS
• VCOMISD
• VCOMISH
• VCOMISS
• VCOMPRESSPD
• VCOMPRESSPS
• VCVTDQ2PD
• VCVTDQ2PH
• VCVTDQ2PS
• VCVTNE2PS2BF16
• VCVTNEPS2BF16
• VCVTPD2DQ
• VCVTPD2PH
• VCVTPD2PS
• VCVTPD2QQ

All 686 AVX10.1 instructions