Instruction
VCMPSD
Compares the low doubles with one of 32 predicates an immediate selects, into an all-ones or zero element (VEX) or a mask register (EVEX).
- Extensions
- Forms
- 4 (2 VEX, 2 EVEX)
- Data
- Intel XED v2026.08.23
Forms
| Instruction | Encoding | Requires |
|---|---|---|
VCMPSD xmm, xmm, m64, imm8
VCMPSD_XMMdq_XMMdq_MEMq_IMMb | VEX.LIG.F2.0F.WIG C2 /r ib | AVX |
VCMPSD xmm, xmm, xmm, imm8
VCMPSD_XMMdq_XMMdq_XMMq_IMMb | VEX.LIG.F2.0F.WIG C2 /r ib | AVX |
VCMPSD k {k}, xmm, xmm, imm8, {sae}
VCMPSD_MASKmskw_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 | EVEX.LIG.F2.0F.W1 C2 /r ib | AVX10.1 or AVX512F |
VCMPSD k {k}, xmm, m64, imm8
VCMPSD_MASKmskw_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 | EVEX.LIG.F2.0F.W1 C2 /r ib | AVX10.1 or AVX512F |
Intrinsics
The C intrinsics of Clang 23.1.2 that compile to VCMPSD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.
| Intrinsic | Compiles to |
|---|---|
_mm_cmp_round_sd_mask
__mmask8 _mm_cmp_round_sd_mask(__m128d X, __m128d Y, const int P, const int R) |
|
_mm_cmp_sd_mask
__mmask8 _mm_cmp_sd_mask(__m128d X, __m128d Y, const int P) |
|
_mm_cmpeq_sd
__m128d _mm_cmpeq_sd(__m128d __a, __m128d __b) |
|
_mm_cmple_sd
__m128d _mm_cmple_sd(__m128d __a, __m128d __b) |
|
_mm_cmplt_sd
__m128d _mm_cmplt_sd(__m128d __a, __m128d __b) |
|
_mm_cmpneq_sd
__m128d _mm_cmpneq_sd(__m128d __a, __m128d __b) |
|
_mm_cmpnle_sd
__m128d _mm_cmpnle_sd(__m128d __a, __m128d __b) |
|
_mm_cmpnlt_sd
__m128d _mm_cmpnlt_sd(__m128d __a, __m128d __b) |
|
_mm_cmpord_sd
__m128d _mm_cmpord_sd(__m128d __a, __m128d __b) |
|
_mm_cmpunord_sd
__m128d _mm_cmpunord_sd(__m128d __a, __m128d __b) |
|
_mm_comi_round_sd
int _mm_comi_round_sd(__m128d A, __m128d B, const int P, const int R) |
|
_mm_mask_cmp_round_sd_mask
__mmask8 _mm_mask_cmp_round_sd_mask(__mmask8 M, __m128d X, __m128d Y, const int P, const int R) |
|
_mm_mask_cmp_sd_mask
__mmask8 _mm_mask_cmp_sd_mask(__mmask8 M, __m128d X, __m128d Y, const int P) |
|
CPUID and processors
Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.
| ISA set | CPUID | Processors in XED |
|---|---|---|
AVX | AVX | Sandy Bridge, Ivy Bridge, Haswell, Broadwell, Skylake, Comet Lake, Cannon Lake, Ice Lake (client), Tiger Lake, Alder Lake, Arrow Lake, Panther Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Sierra Forest, Clearwater Forest, Knights Landing, Knights Mill, Bulldozer, Piledriver, Zen, Zen+, Zen 2 |
AVX512F_SCALAR | AVX10.1 or AVX512F | Cannon Lake, Ice Lake (client), Tiger Lake, Nova Lake, Skylake-SP, Cascade Lake, Cooper Lake, Ice Lake (server), Sapphire Rapids, Emerald Rapids, Granite Rapids, Diamond Rapids, Knights Landing, Knights Mill |
More AVX10.1 instructions
- VANDNPS
- VANDPD
- VANDPS
- VBLENDMPD
- VBLENDMPS
- VBROADCASTF32X2
- VBROADCASTF32X4
- VBROADCASTF32X8
- VBROADCASTF64X2
- VBROADCASTF64X4
- VBROADCASTI32X2
- VBROADCASTI32X4
- VBROADCASTI32X8
- VBROADCASTI64X2
- VBROADCASTI64X4
- VBROADCASTSD
- VBROADCASTSS
- VCMPPD
- VCMPPH
- VCMPPS
- VCMPSH
- VCMPSS
- VCOMISD
- VCOMISH
- VCOMISS
- VCOMPRESSPD
- VCOMPRESSPS
- VCVTDQ2PD
- VCVTDQ2PH
- VCVTDQ2PS
- VCVTNE2PS2BF16
- VCVTNEPS2BF16
- VCVTPD2DQ
- VCVTPD2PH
- VCVTPD2PS
- VCVTPD2QQ
- VCVTPD2UDQ
- VCVTPD2UQQ
- VCVTPH2DQ
- VCVTPH2PD
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Clang's x86 intrinsic headers, LLVM 23.1.2 (commit
85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them. - Intel Advanced Vector Extensions 10.2 Architecture Specification, revision 6.0 (361050-006, January 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.