Instruction
VCVTNEEPH2PS
Converts the even-numbered half-precision values of a memory operand to single precision, without floating-point exceptions.
- Extensions
- Forms
- 2 (2 VEX)
- Data
- Intel XED v2026.08.23
Forms
| Instruction | Encoding | Requires |
|---|---|---|
VCVTNEEPH2PS xmm, m128
VCVTNEEPH2PS_XMMf32_MEM2f16 | VEX.128.66.0F38.W0 B0 /r | AVX_NE_CONVERT |
VCVTNEEPH2PS ymm, m256
VCVTNEEPH2PS_YMMf32_MEM2f16 | VEX.256.66.0F38.W0 B0 /r | AVX_NE_CONVERT |
Intrinsics
The C intrinsics of Clang 23.1.2 that compile to VCVTNEEPH2PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.
| Intrinsic | Compiles to |
|---|---|
_mm_cvtneeph_ps
__m128 _mm_cvtneeph_ps(const __m128h *__A) |
|
_mm256_cvtneeph_ps
__m256 _mm256_cvtneeph_ps(const __m256h *__A) |
|
CPUID and processors
Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.
| ISA set | CPUID | Processors in XED |
|---|---|---|
AVX_NE_CONVERT | AVX_NE_CONVERT | Arrow Lake, Panther Lake, Nova Lake, Diamond Rapids, Sierra Forest, Clearwater Forest |
More AVX-NE-CONVERT instructions
Sources
- Intel XED v2026.08.23 (commit
0bcb6237345c): forms, encodings, ISA sets, CPUID bits and chip model. - Clang's x86 intrinsic headers, LLVM 23.1.2 (commit
85ac56026243): the intrinsics, their signatures and doc comments, and the Clang of that release, which compiled each of them. - Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 2 (325383-092, June 2026)
The tables are derived from Intel XED, Copyright Intel Corporation, licensed under the Apache License 2.0; x86-64.net converted and reformatted them. The intrinsics and their signatures come from Clang, part of the LLVM Project, licensed under the Apache License 2.0 with LLVM Exceptions. The text is our own.