VCVTPS2BF8

VCVTPS2BF8 rounds each single to the 8-bit E5M2 format (a sign, 5 exponent bits and 2 fraction bits, which the mnemonics call BF8), to nearest even, and packs the bytes into the low end of an xmm register: an xmm, ymm or zmm source of 4, 8 or 16 singles gives 4, 8 or 16 bytes, and the rest of the register is cleared. It takes a write mask with one bit per result byte, and a broadcast single from memory. It belongs to AVX10_V2_AUX, a group of conversions that the ACE specification defines and CPUID.(EAX=24H,ECX=1):ECX[3] reports: opcode 39h with the F3 prefix in EVEX map 5, W0. VCVTPS2BF8S saturates instead of overflowing, VCVTPH2BF8 is AVX10.2’s conversion from halves, and VCVTBF82PS converts back, exactly.

Fixed rounding, no flags#

MXCSR plays no part: the rounding is always to nearest even, there is no {er} form, no flag is set and no exception is raised. A denormal single counts as a zero, as if DAZ were set, but small results are kept: E5M2’s denormals reach down to 2^-16 in steps of that size, so 1.5 × 2^-17 gives 01h, and 2^-17, a tie with zero, gives 00h. XED marks the forms as flushing denormal results to zero, but ACE says that FTZ is not obeyed, and the Operation section keeps them.

E5M2 has the exponent range of FP16, and its largest finite value is 57,344 (1.75 × 2^15). Singles from 61,440, the midpoint to 2^16, become infinity, at the tie because infinity’s fraction 00 is the even one, and an infinity stays infinite. A NaN gives a quiet E5M2 NaN whose last bit is bit 21 of the single, the payload bit below the quiet bit. The single nearest 0.1 gives 2Eh, which is 0.09375, and 1.0 gives 3Ch.

In our builds#

Neither compiler has the instruction: Clang 23’s assembler and GNU as 2.44 reject the mnemonic, and Clang 23’s headers have none of the intrinsics that ACE names, such as _mm512_cvtps_bf8. This site’s recorded cases include none of VCVTPS2BF8.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        xmm1.bf8[i] = to_bf8(src2.f32[i])
    elif zeroing:
        xmm1.bf8[i] = 0
    # else: xmm1.bf8[i] keeps its value
for i in range(VL // 32, 16):
    xmm1.b[i] = 0
# m32bcst: src2.f32[i] is the m32 for every i
# BF8: to nearest even, denormals kept, no flags; MXCSR unused
# xmm1 is zeroed from bit 128 up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10_V2_AUX instructions

• VCVTBF42HF8
• VCVTBF62HF8
• VCVTBF82BF4S
• VCVTBF82BF6S
• VCVTBF82PS
• VCVTBIASPS2BF8
• VCVTBIASPS2BF8S
• VCVTBIASPS2HF8
• VCVTBIASPS2HF8S
• VCVTHF62HF8
• VCVTHF82BF4S
• VCVTHF82HF6S
• VCVTHF82PS
• VCVTPS2BF8S
• VCVTPS2HF8
• VCVTPS2HF8S
• VCVTROPS2HF8
• VCVTROPS2HF8S
• VPMOVSSDB
• VUNPACKB