VCVTROPS2HF8

VCVTROPS2HF8 converts singles to E4M3 as VCVTPS2HF8 does, into the low end of an xmm register under a write mask of one bit per byte, but it rounds to odd: the fraction is cut to E4M3’s 3 bits, and if any bit cut away was set, the last kept bit is set too. The result is often not the nearest: 1.0625, halfway between 1 and 1.125, gives 1.125 (39h), and so does 1 + 2^-20. Exact values, such as 1.0 (38h), are kept. It belongs to AVX10_V2_AUX of the ACE specification, opcode 38h with the 66 prefix in EVEX map 5, W0 (with F3 the same opcode is VCVTPS2HF8). VCVTROPS2HF8S saturates. MXCSR is neither read nor written, and nothing is flagged.

For a second narrowing#

ACE gives the reason: a value rounded to odd can later be narrowed to a smaller format with no more error than one rounding. A single a little above 5, such as 5.001, lies past 5, the midpoint between 4 and 6 in the 4-bit E2M1 format, and so belongs at 6. VCVTPS2HF8 gives 5.0 (4Ah), a tie that VCVTHF82BF4S then rounds to the even 4. VCVTROPS2HF8 gives 5.5 (4Bh), which VCVTHF82BF4S rounds to 6.

At the edges#

Rounding to odd pulls toward the next encoding at both ends of the range. Any normal single below the smallest denormal, 2^-9, gives 2^-9 (01h) rather than zero; a denormal single still counts as a zero. At the top, the odd encoding above 448 (7Eh) is 7Fh, the NaN, so every single above 448 gives the NaN, where VCVTPS2HF8 still gives 448 up to 464. Infinities and NaNs give the NaN too.

In our builds#

GCC 14 and Clang 23 have no option for AVX10_V2_AUX: Clang 23’s assembler and GNU as 2.44 reject the mnemonic, and ACE’s intrinsic _mm512_cvtrops_hf8 is missing from Clang 23’s headers. This site’s recorded cases include none of VCVTROPS2HF8.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        a = src2.f32[i]
        xmm1.hf8[i] = to_hf8_odd(a)
    elif zeroing:
        xmm1.hf8[i] = 0
    # else: xmm1.hf8[i] keeps its value
for i in range(VL // 32, 16):
    xmm1.b[i] = 0
# m32bcst: src2.f32[i] is the m32 for every i
# HF8: to odd, denormals kept, no flags; MXCSR unused
# xmm1 is zeroed from bit 128 up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking

Memory forms

embedded broadcast (tuple Full); memory fault suppression

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10_V2_AUX instructions

• VCVTBF42HF8
• VCVTBF62HF8
• VCVTBF82BF4S
• VCVTBF82BF6S
• VCVTBF82PS
• VCVTBIASPS2BF8
• VCVTBIASPS2BF8S
• VCVTBIASPS2HF8
• VCVTBIASPS2HF8S
• VCVTHF62HF8
• VCVTHF82BF4S
• VCVTHF82HF6S
• VCVTHF82PS
• VCVTPS2BF8
• VCVTPS2BF8S
• VCVTPS2HF8
• VCVTPS2HF8S
• VCVTROPS2HF8S
• VPMOVSSDB
• VUNPACKB