VCVTTPD2UDQS

VCVTTPD2UDQS converts doubles to unsigned doublewords, truncating toward zero, and saturates: 2^32 or more becomes FFFFFFFFh, a value of -1 or less becomes 0, and so does a NaN. VCVTTPD2UDQ writes FFFFFFFFh, the unsigned indefinite, for every one of those cases, so a negative input there reads as the largest value. Values between -1 and 0 truncate to 0 in both without raising the invalid exception. As for the signed VCVTTPD2DQS, the result is half as wide as the source, and NaNs, infinities and out-of-range values still set IE. It belongs to AVX10.2: opcode 6Ch in EVEX map 5, no prefix, W1, one below the signed form’s 6Dh, with a write mask, a broadcast double and {sae} on the 512-bit form.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 with -mavx10.2 compiles _mm256_cvtts_pd_epu32 to vcvttpd2udqs xmm0, ymm0; a loop converting doubles to uint32_t keeps VCVTTPD2UDQ. The specification’s helper for this conversion (revision 7.0) also sets PE for every negative input and every one above 2^32 - 1, an extra test that the other helpers lack. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        a = src2.f64[i]
        ymm1.d[i] = cvtts_uint(a, 32)
    elif zeroing:
        ymm1.d[i] = 0
    # else: ymm1.d[i] keeps its value
for i in range(VL // 64, 4):
    ymm1.d[i] = 0
# m64bcst: src2.f64[i] is the m64 for every i
# {sae}: no exception flags
# ymm1 is zeroed from bit 128 (xmm) or 256 (ymm) up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E2

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VCVTTPD2UDQS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VCVT2PS2PHX
• VCVTBF162IBS
• VCVTBF162IUBS
• VCVTBIASPH2BF8
• VCVTBIASPH2BF8S
• VCVTBIASPH2HF8
• VCVTBIASPH2HF8S
• VCVTHF82PH
• VCVTPH2BF8
• VCVTPH2BF8S
• VCVTPH2HF8
• VCVTPH2HF8S
• VCVTPH2IBS
• VCVTPH2IUBS
• VCVTPS2IBS
• VCVTPS2IUBS
• VCVTTBF162IBS
• VCVTTBF162IUBS
• VCVTTPD2DQS
• VCVTTPD2QQS
• VCVTTPD2UQQS
• VCVTTPH2IBS
• VCVTTPH2IUBS
• VCVTTPS2DQS
• VCVTTPS2IBS
• VCVTTPS2IUBS
• VCVTTPS2QQS
• VCVTTPS2UDQS
• VCVTTPS2UQQS
• VCVTTSD2SIS
• VCVTTSD2USIS
• VCVTTSS2SIS
• VCVTTSS2USIS
• VDIVBF16
• VDPPHPS
• VFMADD132BF16
• VFMADD213BF16
• VFMADD231BF16
• VFMSUB132BF16
• VFMSUB213BF16

All 96 AVX10.2 instructions