VFMADD231BF16

VFMADD231BF16 computes op2 × op3 + op1 for each bfloat16 element, 8, 16 or 32 per register, rounds once to nearest even and writes the result over op1. It is the 231 order of AVX10.2’s multiply-add, one of the twelve forms that VFMADD132BF16’s page describes with their shared rules: denormal inputs and results taken as zeros, no exceptions and no MXCSR. Its opcode is B8h in EVEX map 6 with no prefix and W0; VFMADD231PH has the same byte with 66. Only op3 may come from memory or be broadcast from 16 bits.

VFMADD231PS explains the three orders for singles. Under merge masking an element whose mask bit is clear keeps op1, here the addend.

In our builds#

GCC 14 has no AVX10.2 option. Clang 23 at -O2 with -mavx10.2 compiles _mm512_mask3_fmadd_pbh(a, b, c, k), which keeps c where the mask is clear, to vfmadd231bf16 zmm2 {k1}, zmm0, zmm1 and a move of the result. A loop s = _mm512_fmadd_pbh(x[i], y[i], s) uses it on every pass, with y from memory. With -ffast-math, a scalar dot product over __bf16 arrays becomes VMULBF16 and one chain of VFMADD231BF16 and VFMADD132BF16 on zmm registers, reduced with VADDBF16; the sum stays bfloat16 throughout, where VDPBF16PS accumulates in singles. Without that option the loop stays scalar. No AVX10.2 processor appears in this site’s recorded cases.

Forms

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 16):
    if k1[i]:
        a = zmm1.bf16[i]
        b = zmm2.bf16[i]
        c = src3.bf16[i]
        zmm1.bf16[i] = fmadd(b, c, a)
    elif zeroing:
        zmm1.bf16[i] = 0
    # else: zmm1.bf16[i] keeps its value
# m16bcst: src3.bf16[i] is the m16 for every i
# BF16: to nearest even, denormals flushed, no flags; MXCSR unused
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E4

Attributes

What else XED records about the forms. How to read.

All forms

write masking; always rounds to nearest even; denormal inputs read as zero; denormal results flushed to zero

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VFMADD231BF16, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.2 instructions

• VCVTTPD2DQS
• VCVTTPD2QQS
• VCVTTPD2UDQS
• VCVTTPD2UQQS
• VCVTTPH2IBS
• VCVTTPH2IUBS
• VCVTTPS2DQS
• VCVTTPS2IBS
• VCVTTPS2IUBS
• VCVTTPS2QQS
• VCVTTPS2UDQS
• VCVTTPS2UQQS
• VCVTTSD2SIS
• VCVTTSD2USIS
• VCVTTSS2SIS
• VCVTTSS2USIS
• VDIVBF16
• VDPPHPS
• VFMADD132BF16
• VFMADD213BF16
• VFMSUB132BF16
• VFMSUB213BF16
• VFMSUB231BF16
• VFNMADD132BF16
• VFNMADD213BF16
• VFNMADD231BF16
• VFNMSUB132BF16
• VFNMSUB213BF16
• VFNMSUB231BF16
• VFPCLASSBF16
• VGETEXPBF16
• VGETMANTBF16
• VMAXBF16
• VMINBF16
• VMINMAXBF16
• VMINMAXPD
• VMINMAXPH
• VMINMAXPS
• VMINMAXSD
• VMINMAXSH

All 96 AVX10.2 instructions