VFMADDSUB231PS

VFMADDSUB231PS computes op2 × op3 ∓ op1 for each single, rounded once, with the sign alternating: the even elements (0, 2, 4 …) subtract the destination’s old value and the odd ones add it. It is the fused form of ADDSUBPS’s pattern, and VFMSUBADD231PS is its mirror, adding in the even elements. VFMADD231PS covers what the family shares: the three-digit names, the single rounding, masking, broadcast and {er} in the EVEX forms.

Made for complex numbers#

With a complex number stored as its real part followed by its imaginary part, (a + bi)(c + di) = (ac - bd) + (ad + bc)i, so the real part subtracts in the even element and the imaginary part adds in the odd one. GCC 14 at -O2 with -ffast-math compiles a loop of _Complex float products that way for -march=x86-64-v3:

• VPERMILPS copies each real part into an (a, a) pair and each imaginary part into (b, b), and swaps each (c, d) pair to (d, c);
• VMULPS forms (bd, bc);
• VFMADDSUB231PS multiplies (a, a) by (c, d) and subtracts that pair’s first element, adds its second: (ac - bd, ad + bc).

For -march=x86-64-v4 the same sequence runs on zmm registers. Clang 23 instead separates the real and imaginary parts and uses VFMSUB231PS and VFMADD231PS on them. Without -ffast-math, both stay scalar and call __mulsc3, the compiler runtime’s helper, when a part of the result is a NaN, since C asks for an infinite result in some of those cases.

Alternating signs on Zen 5#

In vfmaddsub231ps xmm12, xmm6, xmm6, recorded with MXCSR rounding down, the elements show both signs and their zeros:

• element 0: 1 × 1 - 1 gave -0, the sign rounding down gives an exact zero difference;
• element 1: 2 × 2 + (-infinity) gave -infinity;
• element 3: 1 × 1 + 0 gave 1.

A case with FTZ set computed 2 × -2.5 - 4 = -9 in element 4, an even element, where an odd one would have given -1.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:  # 1 without a write mask
        a = zmm1.f32[i]
        b = zmm2.f32[i]
        c = src3.f32[i]
        if i % 2 == 0:
            zmm1.f32[i] = fmsub(b, c, a)
        else:
            zmm1.f32[i] = fmadd(b, c, a)
    elif zeroing:
        zmm1.f32[i] = 0
    # else: zmm1.f32[i] keeps its value
# m32bcst: src3.f32[i] is the m32 for every i
# {er}: the form's rounding, not MXCSR.RC, and no flags
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

VEX forms

avx-type-2

EVEX forms

AVX512-E2

Attributes

What else XED records about the forms. How to read.

All forms

follows MXCSR

EVEX forms

write masking

EVEX memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VFMADDSUB231PS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More FMA instructions

• VFMADD132PD
• VFMADD132PS
• VFMADD132SD
• VFMADD132SS
• VFMADD213PD
• VFMADD213PS
• VFMADD213SD
• VFMADD213SS
• VFMADD231PD
• VFMADD231PS
• VFMADD231SD
• VFMADD231SS
• VFMADDSUB132PD
• VFMADDSUB132PS
• VFMADDSUB213PD
• VFMADDSUB213PS
• VFMADDSUB231PD
• VFMSUB132PD
• VFMSUB132PS
• VFMSUB132SD
• VFMSUB132SS
• VFMSUB213PD
• VFMSUB213PS
• VFMSUB213SD
• VFMSUB213SS
• VFMSUB231PD
• VFMSUB231PS
• VFMSUB231SD
• VFMSUB231SS
• VFMSUBADD132PD
• VFMSUBADD132PS
• VFMSUBADD213PD
• VFMSUBADD213PS
• VFMSUBADD231PD
• VFMSUBADD231PS
• VFNMADD132PD
• VFNMADD132PS
• VFNMADD132SD
• VFNMADD132SS
• VFNMADD213PD

All 60 FMA instructions

More AVX10.1 instructions

• VFMADD213PS
• VFMADD213SD
• VFMADD213SH
• VFMADD213SS
• VFMADD231PD
• VFMADD231PH
• VFMADD231PS
• VFMADD231SD
• VFMADD231SH
• VFMADD231SS
• VFMADDCPH
• VFMADDCSH
• VFMADDSUB132PD
• VFMADDSUB132PH
• VFMADDSUB132PS
• VFMADDSUB213PD
• VFMADDSUB213PH
• VFMADDSUB213PS
• VFMADDSUB231PD
• VFMADDSUB231PH
• VFMSUB132PD
• VFMSUB132PH
• VFMSUB132PS
• VFMSUB132SD
• VFMSUB132SH
• VFMSUB132SS
• VFMSUB213PD
• VFMSUB213PH
• VFMSUB213PS
• VFMSUB213SD
• VFMSUB213SH
• VFMSUB213SS
• VFMSUB231PD
• VFMSUB231PH
• VFMSUB231PS
• VFMSUB231SD
• VFMSUB231SH
• VFMSUB231SS
• VFMSUBADD132PD
• VFMSUBADD132PH

All 686 AVX10.1 instructions