VGETEXPPD

VGETEXPPD returns the binary exponent of each double as a double: the largest integer e with 2^e no greater than |x|, the value of C’s logb for finite nonzero inputs. VGETEXPPS describes the operation for singles, its special inputs (zero gives -infinity, an infinity +infinity, a NaN itself, quieted) and its pairing with VGETMANT and VSCALEF; the double form differs only in its range. A normal double gives -1022 to 1023, and a denormal, which VGETEXPPD normalizes first, -1023 down to -1074, with MXCSR’s DE flag; under DAZ a denormal counts as zero and gives -infinity.

Recorded on Zen 5#

Most of the cases recorded on Zen 5 ran with DAZ set; they show the ends of the normal range and the sign being ignored:

• 0010000000000000h, the smallest normal double, gave -1022.0, and FFEFFFFFFFFFFFFFh, the most negative finite double, 1023.0.
• -1.0 gave +0.0, 2.0 gave 1.0 and 4.0 gave 2.0; a broadcast -2147483648.0 gave 31.0 in each element the mask selected.
• -0.0 gave -infinity, and so did the negative denormal 8008000000000000h under DAZ.

In compiled code#

GCC 14 and Clang 23 at -O2 call the library for logb and ilogb on doubles even with -march=x86-64-v4 -ffast-math, so VGETEXPPD comes from the intrinsics _mm512_getexp_pd and their masked and rounding variants. The result is a double; converting it to an integer, as ilogb would return, takes a VCVTTPD2DQ more.

AMD’s latency spreadsheet for Zen 5 lists VGETEXPPD as it lists VGETEXPPS: one macro-op with a latency of 3 cycles, on FP2 and FP3.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 64):
    if k1[i]:
        zmm1.f64[i] = getexp(src2.f64[i])
    elif zeroing:
        zmm1.f64[i] = 0
    # else: zmm1.f64[i] keeps its value
# m64bcst: src2.f64[i] is the m64 for every i
# {sae}: no exception flags
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E2

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VGETEXPPD, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VFNMSUB213PS
• VFNMSUB213SD
• VFNMSUB213SH
• VFNMSUB213SS
• VFNMSUB231PD
• VFNMSUB231PH
• VFNMSUB231PS
• VFNMSUB231SD
• VFNMSUB231SH
• VFNMSUB231SS
• VFPCLASSPD
• VFPCLASSPH
• VFPCLASSPS
• VFPCLASSSD
• VFPCLASSSH
• VFPCLASSSS
• VGATHERDPD
• VGATHERDPS
• VGATHERQPD
• VGATHERQPS
• VGETEXPPH
• VGETEXPPS
• VGETEXPSD
• VGETEXPSH
• VGETEXPSS
• VGETMANTPD
• VGETMANTPH
• VGETMANTPS
• VGETMANTSD
• VGETMANTSH
• VGETMANTSS
• VGF2P8AFFINEINVQB
• VGF2P8AFFINEQB
• VGF2P8MULB
• VINSERTF32X4
• VINSERTF32X8
• VINSERTF64X2
• VINSERTF64X4
• VINSERTI32X4
• VINSERTI32X8

All 686 AVX10.1 instructions