VGETEXPPS

VGETEXPPS returns the binary exponent of each single as a single: the largest integer e with 2^e no greater than |x|, so 8 gives 3.0, 0.75 gives -1.0 and 1e30 gives 99.0. The sign of x does not matter. It is C’s logbf for every finite nonzero input, done on a whole vector without touching the bits by hand: shifting the exponent field out with an integer shift gives the wrong answer for denormals and needs the special values sorted out separately.

Special inputs#

Zen 5 recorded each row: the smallest denormal gave -149.0 and 007FFFFFh gave -127.0, with MXCSR’s DE flag set, and with DAZ both gave -infinity. A zero raises no divide-by-zero flag here, where logbf(0) does. The register form of the zmm version takes {sae} to report no flags at all.

With VGETMANTPS and VSCALEFPS#

VGETMANTPS returns the other half of the number, its significand normalized to an interval the immediate chooses, so that x equals the significand times 2 to the exponent, and VSCALEFPS puts the two back together. The x87 instruction FXTRACT splits a number the same way in one step. Intel’s optimization manual builds logarithms on the split (Section 17.15.2): log2(x) is VGETEXP(x) plus log2 of the significand in [1, 2), which a short polynomial or a table covers, and the reverse pairing with VSCALEF gives a division without branches for overflow, underflow or special inputs (Section 17.15.5).

Neither GCC 14 nor Clang 23 at -O2 turns logbf into VGETEXPPS, even with -ffast-math: both call the library function. The instruction comes from the intrinsics _mm512_getexp_ps and their kin.

AMD’s Zen 5 guide lists VGETEXPPS as one macro-op with a latency of 3 cycles, the same as VGETMANTPS.

Forms

Latency and throughput

Data flow

Where the elements of the sources go, element 0 on the right; results that depend on a control value are drawn for an example. How to read.

Operation

What the forms do, in pseudocode that our tests run against results recorded on real processors. How to read.

for i in range(VL // 32):
    if k1[i]:
        zmm1.f32[i] = getexp(src2.f32[i])
    elif zeroing:
        zmm1.f32[i] = 0
    # else: zmm1.f32[i] keeps its value
# m32bcst: src2.f32[i] is the m32 for every i
# {sae}: no exception flags
# zmm1 is zeroed from bit VL up

Operands

Flags

None: XED records no flag that the forms test or change.

Exceptions

The exception class is XED's name for the set of exception conditions that a form follows. How to read.

All forms

AVX512-E2

Attributes

What else XED records about the forms. How to read.

All forms

write masking; follows MXCSR

Memory forms

embedded broadcast (tuple Full); memory fault suppression

Intrinsics

The C intrinsics of Clang 23.1.2 that compile to VGETEXPPS, each with the form it compiles to and the Clang options it needs. The forms come from compiling every intrinsic and decoding the result with Intel XED; all intrinsics A–Z explains the method.

CPUID and processors

Each form belongs to an XED ISA set. A form can be used when the processor reports every CPUID bit of one of its ISA set's alternatives.

More AVX10.1 instructions

• VFNMSUB213SH
• VFNMSUB213SS
• VFNMSUB231PD
• VFNMSUB231PH
• VFNMSUB231PS
• VFNMSUB231SD
• VFNMSUB231SH
• VFNMSUB231SS
• VFPCLASSPD
• VFPCLASSPH
• VFPCLASSPS
• VFPCLASSSD
• VFPCLASSSH
• VFPCLASSSS
• VGATHERDPD
• VGATHERDPS
• VGATHERQPD
• VGATHERQPS
• VGETEXPPD
• VGETEXPPH
• VGETEXPSD
• VGETEXPSH
• VGETEXPSS
• VGETMANTPD
• VGETMANTPH
• VGETMANTPS
• VGETMANTSD
• VGETMANTSH
• VGETMANTSS
• VGF2P8AFFINEINVQB
• VGF2P8AFFINEQB
• VGF2P8MULB
• VINSERTF32X4
• VINSERTF32X8
• VINSERTF64X2
• VINSERTF64X4
• VINSERTI32X4
• VINSERTI32X8
• VINSERTI64X2
• VINSERTI64X4

All 686 AVX10.1 instructions